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TPS75003MRHLREP PDF预览

TPS75003MRHLREP

更新时间: 2024-11-23 12:16:19
品牌 Logo 应用领域
德州仪器 - TI 电源电路电源管理电路
页数 文件大小 规格书
29页 1312K
描述
Triple-Supply Power Management IC for Powering FPGAs and DSPs

TPS75003MRHLREP 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active零件包装代码:QFN
包装说明:QFN-20针数:20
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:6 weeks
风险等级:0.8Is Samacsys:N
可调阈值:YES模拟集成电路 - 其他类型:POWER SUPPLY SUPPORT CIRCUIT
JESD-30 代码:R-PQCC-N20JESD-609代码:e4
长度:4.5 mm湿度敏感等级:1
信道数量:3功能数量:1
端子数量:20最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:PLASTIC/EPOXY
封装代码:HVQCCN封装等效代码:LCC20/24,.14X.18,20
封装形状:RECTANGULAR封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):260电源:2.5/6 V
认证状态:Not Qualified座面最大高度:0.9 mm
子类别:Power Management Circuits最大供电电流 (Isup):0.15 mA
最大供电电压 (Vsup):6.5 V最小供电电压 (Vsup):2.2 V
标称供电电压 (Vsup):3 V表面贴装:YES
温度等级:MILITARY端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3.5 mmBase Number Matches:1

TPS75003MRHLREP 数据手册

 浏览型号TPS75003MRHLREP的Datasheet PDF文件第2页浏览型号TPS75003MRHLREP的Datasheet PDF文件第3页浏览型号TPS75003MRHLREP的Datasheet PDF文件第4页浏览型号TPS75003MRHLREP的Datasheet PDF文件第5页浏览型号TPS75003MRHLREP的Datasheet PDF文件第6页浏览型号TPS75003MRHLREP的Datasheet PDF文件第7页 
TPS75003-EP  
www.ti.com  
SGLS311A DECEMBER 2006REVISED MARCH 2011  
Triple-Supply Power Management IC for Powering FPGAs and DSPs  
Check for Samples: TPS75003-EP  
1
FEATURES  
APPLICATIONS  
FPGA/DSP/ASIC Supplies  
Set-Top Boxes  
DSL Modems  
Plasma TV Display Panels  
2
Two 95% Efficient, 3-A Buck Controllers and  
One 300-mA LDO  
Tested and Endorsed by Xilinx for Powering  
the Spartan-3, Spartan-3E, and Spartan-3L  
FPGAs  
DESCRIPTION  
Adjustable (1.2 V to 6.5 V for Bucks, 1 V to 6.5  
V for LDO) Output Voltages on All Channels  
The TPS75003 is a complete power management  
solution for FPGA, DSP and other multi-supply  
applications. The device has been tested with and  
meets all of the Xilinx Spartan-3, Spartan-3E, and  
Spartan-3L start-up profile requirements, including  
monotonic voltage ramp and minimum voltage rail  
rise time. Independent Enables for each output allow  
sequencing to minimize demand on the power supply  
at start-up. Soft-start on each supply limits inrush  
current during start-up. Two integrated buck  
controllers allow efficient, cost-effective voltage  
conversion for both low and high current supplies  
such as core and I/O. A 300-mA LDO is integrated to  
provide an auxiliary rail such as VCCAUX on the Xilinx  
Spartan-3 FPGA. All three supply voltages are  
offered in user-programmable options for maximum  
flexibility.  
Input Voltage Range: 2.2 V to 6.5 V  
Independent Soft-Start for Each Supply  
Independent Enable for Each Supply for  
Flexible Sequencing  
LDO Stable with 2.2-μF Ceramic Output  
Capicitor  
Small, Low-Profile 4,5 mm x 3,5 mm x 0,9 mm  
QFN Package  
SUPPORTS DEFENSE, AEROSPACE,  
AND MEDICAL APPLICATIONS  
Controlled Baseline  
One Assembly/Test Site  
One Fabrication Site  
The TPS75003 is fully specified from 55°C to  
+125°C and is offered in a QFN package, yielding a  
highly compact total solution size with high power  
dissipation capability.  
Available in Military (55°C/125°C)  
Temperature Range(1)  
Extended Product Life Cycle  
Extended Product-Change Notification  
Product Traceability  
(1) Additional temperature ranges available - contact factory  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
Spartan is a trademark of Xilinx, Inc.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 20062011, Texas Instruments Incorporated  

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