Datasheet > TPS53688RSBT

TPS53688RSBT

更新时间： 2024-11-30 11:15:11

品牌	Logo	应用领域
德州仪器 - TI		/
页数	文件大小	规格书
8页	326K
描述
Dual-channel, 8-phase step-down, digital multiphase D-CAP+™ controller with VR13.HC SVID and PMBus \| RSB \| 40 \| -40 to 125

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TPS53688RSBT 数据手册

TPS53688

_{SLUSE79A – APRIL 2020 – REVISED SEPT}T_EMP_BS_E5_R3₂6₀8₂8₀

SLUSE79A – APRIL 2020 – REVISED SEPTEMBER 2020

www.ti.com

TPS53688 Dual-Channel (N + M ≤ 8 phase) D-CAP+™, Step-Down,

Digital Multiphase Controller with VR13.HC SVID

1 Features

3 Description

•

Input Voltage Range: 4.5 V to 17 V

The TPS53688 is a fully VR13.HC SVID compliant

step-down controller with two channels, built-in non-

volatile memory (NVM), and PMBus^™interface, and is

fully compatible with TI NexFET^™smart power

Output Voltage Range: 0.25 V to 5.5 V

Intel^®VR13.HC SVID Compliant

Dual Output Supporting N+M Phase

Configurations (N+M ≤ 8, M ≤ 4)

Enhanced D-CAP+^™Control to Provide Super

Transient Performance with Excellent Dynamic

Current Sharing

Programmable Loop Compensation

Programmable Phase-Firing Order

Individual Phase Current Calibrations and

Reporting

Dynamic Phase Shedding with Programmable

Thresholds for Optimizing Efficiency at Light and

Heavy Loads

Fast Phase-Adding for Undershoot Reduction

(USR)

Driverless PWM Architecture for Efficient High-

Frequency Switching

Fully Compatible with TI NextFET^™Power Stage

for High-Density Solutions

Accurate, Adjustable, Adaptive Voltage Positioning

(AVP)

Patented AutoBalance^™Phase Current Balancing

Cycle-by-cycle Per-Phase Current Limit

PMBus^™v1.3.1 System Interface for Telemetry of

Voltage, Current, Power, Temperature, and Fault

Conditions

stages. Advanced control features such as the D-CAP

™

architecture with undershoot reduction (USR)

•

provide fast transient response, low output

capacitance, and good dynamic current sharing. The

device also provides a novel phase interleaving

strategy and dynamic phase shedding, for efficiency

improvement across loading conditions. Adjustable

control of output voltage slew rate and adaptive

voltage positioning are natively supported. In addition,

the device supports the PMBus communication

interface, for reporting the telemetry of voltage,

current, power, temperature, and fault conditions to

the host system. All programmable parameters can be

configured through the PMBus interface and stored in

NVM as new default values, to minimize the external

component count.

•

The TPS53688 device is offered in a thermally

enhanced 40-pin QFN packaged and is rated to

operate from –40°C to 125°C.

Device Information

•

PART NUMBER

PACKAGE⁽¹⁾

BODY SIZE (NOM)

TPS53688

QFN (40)

5 mm × 5 mm

(1) For all available packages, see the orderable addendum at

the end of the data sheet.

•

5 mm × 5 mm, 40-Pin, QFN Package

TPS536xx

2 Applications

PWM1

Power

Stage

CSP1

•

Data center & enterprise computing rack server

Hardware accelerator

Network interface card (NIC)

PWM2

CSP2

PMBus

Power

Stage

ASIC and high-performance client

PWM8

CSP8

Power

Stage

Simplified Schematic

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

Submit Document Feedback

Product Folder Links: TPS53688

12 3 4 5 6 7 8

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与TPS53688RSBT相关器件

型号	品牌	获取价格	描述	数据表
TPS53689	TI	获取价格	具有 VR14 SVID 和 PMBus 的双通道八相降压数字多相 D-CAP+™ 控制器
TPS53689RSBR	TI	获取价格	具有 VR14 SVID 和 PMBus 的双通道八相降压数字多相 D-CAP+™ 控制器
TPS53689RSBT	TI	获取价格	具有 VR14 SVID 和 PMBus 的双通道八相降压数字多相 D-CAP+™ 控制器
TPS53689T	TI	获取价格	具有 VR14 SVID 和 PMBus 的双通道八相降压数字多相 D-CAP+? 控制器
TPS536C5	TI	获取价格	适用于 AMD 平台且具有 SVI3 和 PMBus 的 12 相数字降压多相控制器
TPS536C5RSLR	TI	获取价格	适用于 AMD 平台且具有 SVI3 和 PMBus 的 12 相数字降压多相控制器 \|
TPS536C7	TI	获取价格	双通道 D-CAP+™、PMBus（N+M ≤ 12 相）降压多相 PWM 控制器
TPS536C7B1RSLR	TI	获取价格	双通道 D-CAP+™、PMBus（N+M ≤ 12 相）降压多相 PWM 控制器 \| R
TPS536C7B1RSLT	TI	获取价格	双通道 D-CAP+™、PMBus（N+M ≤ 12 相）降压多相 PWM 控制器 \| R
TPS536C9	TI	获取价格	具有 VR14 SVID 和 PMBus 的双通道十二相降压数字多相 D-CAP+™ 控制

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