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TPS536C7

更新时间: 2024-11-30 11:12:11
品牌 Logo 应用领域
德州仪器 - TI 控制器
页数 文件大小 规格书
154页 6547K
描述
双通道 D-CAP+™、PMBus(N+M ≤ 12 相)降压多相 PWM 控制器

TPS536C7 数据手册

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TPS536C7  
SLUSDI9 – SEPTEMBER 2020  
TPS536C7B1 Dual-Channel D-CAP+™, Dual-Channel (N+M ≤ 12 Phases)  
Step-Down, Multiphase Controller with PMBusInterface  
1 Features  
3 Description  
Input Voltage Range: 4.5 V to 18 V  
The TPS536C7B1 is a step-down controller with  
dual channels, built-in non-volatile memory (NVM),  
and PMBus interface, and is fully compatible with  
TI NexFETsmart power stages. Advanced control  
features such as the D-CAP+ architecture provide  
fast transient response, low output capacitance, and  
good current sharing. The device also provides  
a novel phase interleaving strategy and flexible  
firing order. Adjustable control of output voltage  
slew rate and adaptive voltage positioning are  
also supported. In addition, the device supports  
the PMBus communication interface for reporting  
telemetry of voltage, current, power, temperature, and  
fault conditions to the system host. All programmable  
parameters can be configured by the PMBus  
interface, and can be stored in NVM as the new  
default values to minimize the external component  
count.  
Output Voltage Range: 0.25 V to 5.5 V  
Per-phase switching frequency range: 300 kHz to  
2000 kHz  
Dual Output Supporting N+M Phase  
Configurations (N+M ≤ 12, M ≤ 6)  
PMBus v1.3.1 system interface for configuration,  
control and telemetry of voltage, current, power,  
temperature, and fault status  
Adaptive voltage scaling (AVS) through  
VOUT_COMMAND  
Enhanced D-CAP+ control to provide super  
transient performance with excellent dynamic  
current sharing  
Programmable loop compensation  
Flexible phase-firing order  
External pinstrap for Ch. A boot voltage settings  
Individual phase current calibrations and reporting  
Phase thermal balance management (TBM)  
Full support for dynamic phase shedding (DPS)  
Fast phase-adding for undershoot reduction (USR)  
Body-diode braking for overshoot reduction (OSR)  
Driverless Configuration for efficient high-  
frequency switching  
Fully Compatible with TI NexFETpower stage for  
high-density solutions  
Accurate, Programmable Adaptive Voltage  
Positioning (AVP)  
Patented AutoBalancePhase Balancing  
6 mm × 6 mm, 48-Pin, QFN Package  
The TPS536C7B1 device if offered in a thermally  
enhanced 48-pin QFN packaged and is rated to  
operate from –40°C to 125°C.  
Device Information  
PART NUMBER  
PACKAGE(1)  
BODY SIZE (NOM)  
TPS536C7B1  
QFN (48)  
6 mm × 6 mm  
(1) For all available packages, see the orderable addendum at  
the end of the data sheet.  
TPS536C7B1  
PWM1  
Power  
2 Applications  
Stage  
CSP1  
Data center network switches  
Campus and branch switches  
Core and edge routers  
Hardware accelerator cards  
High performance CPU/ASIC/FPGA power  
PWM2  
CSP2  
PMBus  
Power  
Stage  
PWM12  
CSP12  
Power  
Stage  
Simplified Schematic  
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,  
intellectual property matters and other important disclaimers. PRODUCTION DATA.  
 
 
 

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