TPIC1502
QUAD AND HEX POWER DMOS ARRAY
SLIS054 – OCTOBER 1996
Low r
:
DW PACKAGE
(TOP VIEW)
DS(on)
0.25 Ω Typ (Full H-Bridge)
0.4 Ω Typ (Triple Half H-Bridge)
OUTPUT3
SOURCE
GND
V
DD3
GND
1
24
23
22
21
20
19
18
17
16
15
14
Pulsed Current . . . 4 A Per Channel
2
Matched Sense Transistors for Class A-B
Linear Operation
GATE3A
GATE1B
SENSE
OUTPUT1
GATE4A
GATE1A
GATE5A
3
GATE3B
GATE2B
GATE2C
OUTPUT2
GATE4B
GATE2A
GATE5B
4
5
Fast Commutation Speed
6
description
7
8
The TPIC1502 is a monolithic power DMOS array
that consists of ten electrically isolated N-channel
enhancement-mode power DMOS transistors,
four of which are configured as a full H-bridge and
six as a triple half H-bridge. The lower stage of the
full H-bridge is provided with an integrated
sense-FET to allow biasing of the bridge in class
A-B operation.
9
V
10
11
DD1
V
OUTPUT4
DD2
SOURCE 12
13 OUTPUT5
The TPIC1502 is offered in a 24-pin wide-body surface-mount (DW) package and is characterized for operation
over the case temperature range of –40°C to 125°C.
schematic
V
V
V
DD3
24
DD1
DD2
15
11
Q1A
17
Q2A
Q3A
22
Q4A
18
Q5A
16
9
GATE1A
GATE2A
GATE3A
GATE4A
GATE5A
19
7
1
14
13
D3
D1
D2
OUTPUT1
OUTPUT2
OUTPUT3
OUTPUT4
OUTPUT5
Q1B
21
Q2B
5
Q3B
4
Q4B
8
Q5B
10
GATE1B
GATE2B
GATE3B
GATE4B
GATE5B
SENSE
6
20
2, 12
SOURCE
Q2C
GATE2C
6 V
3, 23
GND
NOTES: A. Terminals 3 and 23 must be externally connected.
B. Terminals 2 and 12 must be externally connected.
C. No output may be taken greater than 0.5 V below GND.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 1996, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265