Datasheet > TP5510WM

TP5510WM

更新时间： 2024-09-14 22:42:03

品牌	Logo	应用领域
美国国家半导体 - NSC		/
页数	文件大小	规格书
12页	200K
描述
Full Duplex Analog Front End for Consumer Applications

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技术参数
数据手册

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TP5510WM 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
包装说明：	SOP, SOP16,.4	Reach Compliance Code：	unknown
风险等级：	5.82	压伸定律：	MU-LAW
滤波器：	YES	JESD-30 代码：	R-PDSO-G16
JESD-609代码：	e0	线性编码：	NOT AVAILABLE
负电源额定电压：	-5 V	功能数量：	1
端子数量：	16	最高工作温度：	70 °C
最低工作温度：		封装主体材料：	PLASTIC/EPOXY
封装代码：	SOP	封装等效代码：	SOP16,.4
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE
电源：	+-5 V	认证状态：	Not Qualified
子类别：	Codecs	最大压摆率：	0.012 mA
标称供电电压：	5 V	表面贴装：	YES
技术：	CMOS	电信集成电路类型：	PCM CODEC
温度等级：	COMMERCIAL	端子面层：	Tin/Lead (Sn/Pb)
端子形式：	GULL WING	端子节距：	1.27 mm
端子位置：	DUAL

TP5510WM 数据手册

February 1997

TP5510

Full Duplex Analog Front End (AFE)

for Consumer Applications

General Description

Features

Complete A/D and D/A with filter system including:

Ð Serial Data Interface

The TP5510 consists of a m-law monolithic AFE device uti-

lizing the A/D and D/A conversion architecture shown in

Figure 1, and a serial data interface. The device is fabricat-

ed using National’s advanced double-poly CMOS process

(microCMOS).

Ð Encode high-pass and low-pass filter

Ð Decode low-pass filter with sin x/x correction

Ð Active RC noise filters

Ð m-law compatible A/D and D/A

Ð Internal precision voltage reference

Ð Internal auto-zero circuitry

The A/D portion of the device consists of an input gain

adjust amplifier, an active RC pre-filter which eliminates very

high frequency noise, and a switched-capacitor band-pass

filter that rejects signals below 200 Hz and above 3400 Hz.

Also included are auto-zero circuitry and a compressing

A/D which samples the filtered signal and converts it to the

m-law digital format. The decode portion of the device con-

sists of an expanding D/A, which reconstructs the analog

signal from the compressed m-law code, a low-pass filter

which corrects for the sin x/x response of the D/A output

and rejects signals above 3400 Hz, followed by a single-

ended power amplifier capable of driving low impedance

loads. The device requires a 1.536 MHz, 1.544 MHz or

2.048 MHz master clock, bit clocks which may vary from 64

kHz to 2.048 MHz; and 8 kHz frame sync pulses.

m-lawÐTP5510

5V operation

Low operating powerÐtypically 60 mW

Power-down standby modeÐtypically 3 mW

Automatic power-down

TTL or CMOS compatible digital interfaces

Maximizes PC card circuit density

Plastic DIP and SOIC packages

8-bit digital I/O

13-bit dynamic range

Use with DSP processor

Applications: Tapeless Answering Machines, Cordless

Phones, Cellular Radio

Connection Diagram

Dual-In-Line Package

TL/H/11186–1

Top View

Order Number TP5510WM

See NS Package Number M16B

Order Number TP5510N

See NS Package Number N16A

TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.

1996 National Semiconductor Corporation

TL/H/11186

RRD-B30M27/Printed in U. S. A.

http://www.national.com

12 3 4 5 6 7...12

中文翻译

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与TP5510WM相关器件

型号	品牌	获取价格	描述	数据表
TP5510WMX	ETC	获取价格	u-Law CODEC
TP5511N	ETC	获取价格	A-Law CODEC
TP5511WM	ETC	获取价格	A-Law CODEC
TP5512J	ETC	获取价格	u-Law CODEC
TP5513J	ETC	获取价格	A-Law CODEC
TP5531	3PEAK	获取价格	1.8V, 34Î¼A, RRIO, Zero Drift Op-amps
TP5531-CR	3PEAK	获取价格	1.8V, 34Î¼A, RRIO, Zero Drift Op-amps
TP5531-SR	3PEAK	获取价格	1.8V, 34Î¼A, RRIO, Zero Drift Op-amps
TP5531-TR	3PEAK	获取价格	1.8V, 34Î¼A, RRIO, Zero Drift Op-amps
TP5531U-CR	3PEAK	获取价格	1.8V, 34Î¼A, RRIO, Zero Drift Op-amps

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