Datasheet > TP5322_07

TP5322_07

更新时间： 2024-11-11 03:26:51

品牌	Logo	应用领域
超科 - SUPERTEX		/
页数	文件大小	规格书
4页	517K
描述
P-Channel Enhancement-Mode Vertical DMOS FETs

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TP5322_07 数据手册

TP5322

P-Channel Enhancement-Mode

Vertical DMOS FETs

Features

General Description

The Supertex TP5322 is a low threshold enhancement-

mode (normally-off) transistor utilizing an advanced vertical

DMOS structure and Supertex’s well-proven silicon-gate

manufacturing process. This combination produces a device

with the power handling capabilities of bipolar transistors

and with the high input impedance and positive temperature

coefﬁcient inherent in MOS devices. Characteristic of all

MOS structures, this device is free from thermal runaway and

thermally-induced secondary breakdown.

► High input impedance

► Low threshold

► Low input capacitance

► Fast switching speeds

► Low on resistance

► Low input and output leakage

► Free from secondary breakdown

► Complementary N- and P-channel devices

Supertex’s vertical DMOS FETs are ideally suited to a

wide range of switching and amplifying applications where

high breakdown voltage, high input impedance, low input

capacitance, and fast switching speeds are desired.

Applications

► Logic level interfaces - ideal for TTL and CMOS

► Battery operated systems

► Photo voltaic devices

► Analog switches

► General purpose line drivers

► Telecom switches

Ordering Information

Package Options

R_DS(ON)

(max)

V_GS(TH)

(max)

I_D(ON)

(min)

BV_DSS/BV_DGS

TO-236AB¹

TO-243AA²

TP5322K1

TP5322N8

-22ꢀV

12Ω

-2.4V

-ꢀ.7A

TP5322K1-G

TP5322N8-G

-G indicates package is RoHS compliant (‘Green’)

Notes: ¹Same as SOT-23, ²Same as SOT-89.

Product marking for TO-236AB:

P3C

Product marking for TO-243AA:

TP3C

where = 2-week alpha date code

Pin Conﬁgurations

Absolute Maximum Ratings

Parameter

Value

Drain

Drain-to-source voltage

Drain-to-gate voltage

BV_DSS

BV_DGS

2ꢀV

Gate-to-source voltage

Operating and storage temperature

Soldering temperature³

-55^OC to +15ꢀ^OC

3ꢀꢀ^OC

Absolute Maximum Ratings are those values beyond which damage to the device may

occur. Functional operation under these conditions is not implied. Continuous operation

of the device at the absolute rating level may affect device reliability. All voltages are

referenced to device ground.

Gate

Source

TO-236AB

TO-243AA

(Top View)

(top view)

³Distance of 1.6mm from case for 10 seconds.

12 3 4

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与TP5322_07相关器件

型号	品牌	获取价格	描述	数据表
TP5322K1	SUPERTEX	获取价格	P-Channel Enhancement-Mode Vertical DMOS FET
TP5322K1-G	SUPERTEX	获取价格	P-Channel Enhancement-Mode Vertical DMOS FET
TP5322N8	SUPERTEX	获取价格	P-Channel Enhancement-Mode Vertical DMOS FET
TP5322N8-G	SUPERTEX	获取价格	P-Channel Enhancement-Mode Vertical DMOS FET
TP5335	SUPERTEX	获取价格	P-Channel Enhancement-Mode Vertical DMOS FETs
TP5335	MICROCHIP	获取价格	TP5335 is a low threshold enhancement-mode (normally-off) transistor utilizing an advanced
TP5335_07	SUPERTEX	获取价格	P-Channel Enhancement-Mode Vertical DMOS FET
TP5335K1	SUPERTEX	获取价格	P-Channel Enhancement-Mode Vertical DMOS FETs
TP5335K1-G	SUPERTEX	获取价格	P-Channel Enhancement-Mode Vertical DMOS FET
TP5335NW	SUPERTEX	获取价格	P-Channel Enhancement-Mode Vertical DMOS FETs

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