5秒后页面跳转
TP5335_07 PDF预览

TP5335_07

更新时间: 2024-11-11 03:26:51
品牌 Logo 应用领域
超科 - SUPERTEX /
页数 文件大小 规格书
3页 397K
描述
P-Channel Enhancement-Mode Vertical DMOS FET

TP5335_07 数据手册

 浏览型号TP5335_07的Datasheet PDF文件第2页浏览型号TP5335_07的Datasheet PDF文件第3页 
TP5335  
P-Channel Enhancement-Mode  
Vertical DMOS FET  
Features  
General Description  
The Supertex TP5335 is a low threshold enhancement-  
mode (normally-off) transistor utilizing an advanced vertical  
DMOS structure and Supertex’s well-proven silicon-gate  
manufacturing process. This combination produces a device  
with the power handling capabilities of bipolar transistors  
and the high input impedance and positive temperature  
coefficient inherent in MOS devices. Characteristic of all  
MOS structures, this device is free from thermal runaway  
and thermally-induced secondary breakdown.  
High input impedance and high gain  
Low power drive requirement  
Ease of paralleling  
Low CISS and fast switching speeds  
Excellent thermal stability  
Integral source-drain diode  
Free from secondary breakdown  
Complementary N- and P-channel devices  
Supertex’s vertical DMOS FETs are ideally suited to a  
wide range of switching and amplifying applications where  
high breakdown voltage, high input impedance, low input  
capacitance, and fast switching speeds are desired.  
Applications  
Logic level interfaces - ideal for TTL and CMOS  
Solid state relays  
Analog switches  
Power management  
Telecom switches  
Pin Configuration  
Ordering Information  
Drain  
Package Options  
TO-236AB  
BVDSs  
/
RDS(ON)  
VGS(TH)  
(max)  
(max)  
BVDGs  
-352V  
32Ω  
-±.4V  
TP5335K1 TP5335K1-G  
-G indicates package is RoHS compliant (‘Green’)  
Gate  
Source  
TO-236AB  
(Top View)  
Absolute Maximum Ratings  
Parameter  
Product Marking Information  
Value  
BVDSS  
BVDGS  
±±2V  
Product marking for SOT-±3:  
P3S  
Drain-to-source voltage  
Drain-to-gate voltage  
where = ±-week alpha date code  
Underline indicates Pb-Free (”Green”)  
Gate-to-source voltage  
Operating and storage  
temperature  
-55OC to +152OC  
Soldering temperature*  
322OC  
Absolute Maximum Ratings are those values beyond which damage to the device may  
occur. Functional operation under these conditions is not implied. Continuous operation  
of the device at the absolute rating level may affect device reliability. All voltages are  
referenced to device ground.  
*Distance of 1.6mm from case for 10 seconds.  

与TP5335_07相关器件

型号 品牌 获取价格 描述 数据表
TP5335K1 SUPERTEX

获取价格

P-Channel Enhancement-Mode Vertical DMOS FETs
TP5335K1-G SUPERTEX

获取价格

P-Channel Enhancement-Mode Vertical DMOS FET
TP5335NW SUPERTEX

获取价格

P-Channel Enhancement-Mode Vertical DMOS FETs
TP5358 VISHAY

获取价格

Transistor
TP5358R ALLEGRO

获取价格

Small Signal Field-Effect Transistor, 1-Element, N-Channel, Silicon, Junction FET, TO-226A
TP5358R-STYLE-B ALLEGRO

获取价格

Small Signal Field-Effect Transistor, 1-Element, N-Channel, Silicon, Junction FET, TO-226A
TP5358R-STYLE-C ALLEGRO

获取价格

Small Signal Field-Effect Transistor, 1-Element, N-Channel, Silicon, Junction FET, TO-226A
TP5358R-STYLE-E ALLEGRO

获取价格

Small Signal Field-Effect Transistor, 1-Element, N-Channel, Silicon, Junction FET, TO-226A
TP5358R-STYLE-F ALLEGRO

获取价格

Small Signal Field-Effect Transistor, 1-Element, N-Channel, Silicon, Junction FET, TO-226A
TP5358R-STYLE-G ALLEGRO

获取价格

Small Signal Field-Effect Transistor, 1-Element, N-Channel, Silicon, Junction FET, TO-226A