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TN0110N3-GP003 PDF预览

TN0110N3-GP003

更新时间: 2024-10-29 01:02:11
品牌 Logo 应用领域
超科 - SUPERTEX 开关晶体管
页数 文件大小 规格书
5页 635K
描述
N-Channel Enhancement-Mode Vertical DMOS FET

TN0110N3-GP003 技术参数

生命周期:Transferred包装说明:CYLINDRICAL, O-PBCY-T3
Reach Compliance Code:unknown风险等级:5.64
配置:SINGLE WITH BUILT-IN DIODE最小漏源击穿电压:100 V
最大漏极电流 (ID):0.35 A最大漏源导通电阻:3 Ω
FET 技术:METAL-OXIDE SEMICONDUCTOR最大反馈电容 (Crss):8 pF
JEDEC-95代码:TO-92JESD-30 代码:O-PBCY-T3
元件数量:1端子数量:3
工作模式:ENHANCEMENT MODE最高工作温度:150 °C
最低工作温度:-55 °C封装主体材料:PLASTIC/EPOXY
封装形状:ROUND封装形式:CYLINDRICAL
极性/信道类型:N-CHANNEL表面贴装:NO
端子形式:THROUGH-HOLE端子位置:BOTTOM
晶体管应用:SWITCHING晶体管元件材料:SILICON
Base Number Matches:1

TN0110N3-GP003 数据手册

 浏览型号TN0110N3-GP003的Datasheet PDF文件第2页浏览型号TN0110N3-GP003的Datasheet PDF文件第3页浏览型号TN0110N3-GP003的Datasheet PDF文件第4页浏览型号TN0110N3-GP003的Datasheet PDF文件第5页 
Supertex inc.  
TN0110  
N-Channel Enhancement-Mode  
Vertical DMOS FET  
Features  
General Description  
Low threshold - 2.0V max.  
This low threshold, enhancement-mode (normally-off)  
transistor utilizes a vertical DMOS structure and Supertex’s  
well-proven, silicon-gate manufacturing process. This  
combination produces a device with the power handling  
capabilities of bipolar transistors and the high input  
impedance and positive temperature coefficient inherent  
in MOS devices. Characteristic of all MOS structures, this  
device is free from thermal runaway and thermally-induced  
secondary breakdown.  
High input impedance  
Low input capacitance - 50pF typical  
Fast switching speeds  
Low on-resistance  
Free from secondary breakdown  
Low input and output leakage  
Applications  
Logic level interfaces – ideal for TTL and CMOS  
Solid state relays  
Battery operated systems  
Photo voltaic drives  
Analog switches  
General purpose line drivers  
Telecom switches  
Supertex’s vertical DMOS FETs are ideally suited to a  
wide range of switching and amplifying applications where  
very low threshold voltage, high breakdown voltage, high  
input impedance, low input capacitance, and fast switching  
speeds are desired.  
Ordering Information  
Product Summary  
RDS(ON)  
VGS(th)  
(max)  
2.0V  
ID(ON)  
(min)  
Part Number  
Package Option  
Packing  
BVDSS/BVDGS  
(max)  
TN0110N3-G  
TO-92  
1000/Bag  
100V  
3.0Ω  
2.0A  
TN0110N3-G P002  
TN0110N3-G P003  
TN0110N3-G P005  
TN0110N3-G P013  
TN0110N3-G P014  
TO-92  
2000/Reel  
Pin Configuration  
-G denotes a lead (Pb)-free / RoHS compliant package.  
Contact factory for Wafer / Die availablity.  
Devices in Wafer / Die form are lead (Pb)-free / RoHS compliant.  
DRAIN  
GATE  
SOURCE  
Absolute Maximum Ratings  
Parameter  
Value  
TO-92  
Drain-to-source voltage  
Drain-to-gate voltage  
Gate-to-source voltage  
BVDSS  
BVDGS  
±20V  
Product Marking  
SiTN  
0 1 1 0  
YYWW  
-55OC to +150OC  
YY = Year Sealed  
Operating and storage temperature  
WW = Week Sealed  
Absolute Maximum Ratings are those values beyond which damage to the device may  
occur. Functional operation under these conditions is not implied. Continuous operation  
of the device at the absolute rating level may affect device reliability. All voltages are  
referenced to device ground.  
= “Green” Packaging  
Package may or may not include the following marks: Si or  
TO-92  
Typical Thermal Resistance  
Package  
θja  
TO-92  
132OC/W  
Doc.# DSFP-TN0110  
C080813  
Supertex inc.  
www.supertex.com  

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