TMS320C6472ECTZ6

更新时间： 2024-10-28 12:16:07

品牌	Logo	应用领域
德州仪器 - TI		数字信号处理器
页数	文件大小	规格书
269页	1414K
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TMS320C6472 Fixed-Point Digital Signal Processor

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TMS320C6472ECTZ6 数据手册

TMS320C6472

www.ti.com

SPRS612G–JUNE 2009–REVISED JULY 2011

TMS320C6472 Fixed-Point Digital Signal Processor

1 Features

Congestion Control

IEEE 1149.6 Compliant I/Os

– UTOPIA

• Six On-Chip TMS320C64x+ Megamodules

• Endianess: Little Endian, Big Endian

• C64x+ Megamodule Main Features:

•

UTOPIA Level 2 Slave ATM Controller

8/16-Bit Transmit and Receive

– High-Performance, Fixed-Point

TMS320C64x+ DSP

Operations up to 50 MHz per Direction

– 500/625/700 MHz

•

User-Defined Cell Format up to 64 Bytes

– Eight 32-Bit Instructions/Cycle

– 4000 MIPS/MMACS (16-Bits) at 500 MHz

– Dedicated SPLOOP Instruction

– Compact Instructions (16-Bit)

– Instruction Set Enhancements

– Exception Handling

– Two 10/100/1000 Mb/s Ethernet MACs

(EMACs)

•

Both EMACs are IEEE 802.3 Compliant

EMAC0 Supports:

–

MII, RMII, SS-SMII, GMII, and RGMII

8 Independent Transmit (TX)

Channels

– L1/L2 Memory Architecture:

•

256K-Bit (32K-Byte) L1P Program

RAM/Cache [Direct Mapped, Flexible

Allocation]

256K-Bit (32K-Byte) L1D RAM/Cache

[2-Way Set-Associative, Flexible

Allocation]

4.75M-Bit (608K-Byte) L2 Unified Mapped

RAM/Cache [4-Way Set-Associative,

Flexible Allocation]

–

8 Independent Receive (RX)

Channels

•

EMAC1 Supports:

–

RMII, SS-SMII and RGMII

8 Independent Transmit (TX)

Channels

–

8 Independent Receive (RX)

Channels

•

L1P Memory Controller

L1D Memory Controller

L2 Memory Controller

•

Both EMACs (EMAC0 and EMAC1) Share

MDIO Interface

– 16-Bit Host-Port Interface (HPI)

– One Inter-Integrated Circuit (I²C) Bus

– Six Shared 64-Bit General-Purpose Timers

• System PLL and PLL Controller

– Time Stamp Counter

– One 64-Bit General-Purpose/Watchdog Timer

• Shared Peripherals and Interfaces

• Secondary PLL and PLL Controller, Dedicated

– EDMA Controller

to EMAC

(64 Independent Channels)

• Third PLL and PLL Controller Dedicated to

DDR2 Memory Controller

• 16 General-Purpose I/O (GPIO) Pins

• IEEE-1149.1 (JTAG™)

Boundary-Scan-Compatible

• 737-Pin Ball Grid Array (BGA) Package

(CTZ or ZTZ Suffix), 0.8-mm Ball Pitch

• 0.09-μm/7-Level Cu Metal Process (CMOS)

• 3.3-, 1.8-, 1.5-, 1.2-V I/O Supplies

• 1.0-/1.1-, 1.2-V Core Supplies

• Commercial Temperature [0°C to 85°C]

• Extended Temperature [-40°C to 100°C]

– Shared Memory Architecture

•

Shared L2 Memory Controller

768K-Byte of RAM

Boot ROM

– Three Telecom Serial Interface Ports (TSIPs)

•

Each TSIP is 8 Links of 8 Mbps per

Direction

– 32-Bit DDR2 Memory Controller (DDR2-533

SDRAM)

•

256 M-Byte x 2 Addressable Memory

Space

– Two 1x Serial RapidIO^®Links,

v1.2 Compliant

•

1.25-, 2.5-, 3.125-Gbps Link Rates

Message Passing, DirectIO Support,

Error Management Extensions, and

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCT PREVIEW information concerns products in the formative

or design phase of development. Characteristic data and other

specifications are design goals. Texas Instruments reserves the right

to change or discontinue these products without notice.

12 3 4 5 6 7...269

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与TMS320C6472ECTZ6相关器件

型号	品牌	获取价格	描述	数据表
TMS320C6472ECTZ7	TI	获取价格	TMS320C6472 Fixed-Point Digital Signal Processor
TMS320C6472ECTZA	TI	获取价格	TMS320C6472 Fixed-Point Digital Signal Processor
TMS320C6472ECTZA6	TI	获取价格	TMS320C6472 Fixed-Point Digital Signal Processor
TMS320C6472EZTZ	TI	获取价格	TMS320C6472 Fixed-Point Digital Signal Processor
TMS320C6472EZTZ6	TI	获取价格	TMS320C6472 Fixed-Point Digital Signal Processor
TMS320C6472EZTZ7	TI	获取价格	TMS320C6472 Fixed-Point Digital Signal Processor
TMS320C6472EZTZA	TI	获取价格	TMS320C6472 Fixed-Point Digital Signal Processor
TMS320C6472EZTZA6	TI	获取价格	TMS320C6472 Fixed-Point Digital Signal Processor
TMS320C6474	TI	获取价格	Multicore Digital Signal Processor
TMS320C6474_1	TI	获取价格	Digital Signal Processor Silicon Revisions 1.3, 1.2

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