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TMS27C210-200JL PDF预览

TMS27C210-200JL

更新时间: 2024-11-28 14:45:15
品牌 Logo 应用领域
德州仪器 - TI 可编程只读存储器电动程控只读存储器内存集成电路
页数 文件大小 规格书
15页 191K
描述
64KX16 UVPROM, 200ns, CDIP40, WINDOWED, CERDIP-40

TMS27C210-200JL 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:DIP包装说明:WINDOWED, CERDIP-40
针数:40Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.32.00.61
风险等级:5.8Is Samacsys:N
最长访问时间:200 nsI/O 类型:COMMON
JESD-30 代码:R-CDIP-T40长度:52.07 mm
内存密度:1048576 bit内存集成电路类型:UVPROM
内存宽度:16功能数量:1
端子数量:40字数:65536 words
字数代码:64000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:64KX16输出特性:3-STATE
封装主体材料:CERAMIC, METAL-SEALED COFIRED封装代码:WDIP
封装等效代码:DIP40,.6封装形状:RECTANGULAR
封装形式:IN-LINE, WINDOW并行/串行:PARALLEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
认证状态:Not Qualified座面最大高度:4.907 mm
最大待机电流:0.00025 A子类别:EPROMs
最大压摆率:0.04 mA最大供电电压 (Vsup):5.25 V
最小供电电压 (Vsup):4.75 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:COMMERCIAL端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:15.24 mm
Base Number Matches:1

TMS27C210-200JL 数据手册

 浏览型号TMS27C210-200JL的Datasheet PDF文件第2页浏览型号TMS27C210-200JL的Datasheet PDF文件第3页浏览型号TMS27C210-200JL的Datasheet PDF文件第4页浏览型号TMS27C210-200JL的Datasheet PDF文件第5页浏览型号TMS27C210-200JL的Datasheet PDF文件第6页浏览型号TMS27C210-200JL的Datasheet PDF文件第7页 
TMS27C210A 65536 BY 16-BIT UV ERASABLE  
TMS27PC210A 65536 BY 16-BIT  
PROGRAMMABLE READ-ONLY MEMORIES  
SMLS310D– NOVEMBER 1990 – REVISED SEPTEMBER 1997  
J PACKAGE  
(TOP VIEW)  
Organization . . . 65536 by 16 Bits  
Single 5-V Power Supply  
V
V
CC  
PGM  
1
40  
39  
38  
37  
36  
35  
PP  
E
Operationally Compatible With Existing  
Megabit EPROMs  
2
DQ15  
DQ14  
DQ13  
DQ12  
DQ11  
DQ10  
DQ9  
NC  
3
40-Pin Dual-In-Line Package and 44-Lead  
Plastic Leaded Chip Carrier  
A15  
A14  
A13  
4
5
6
All Inputs/Outputs Fully TTL Compatible  
7
34 A12  
33 A11  
±10% V  
Tolerance  
CC  
8
Maximum Access/Minimum Cycle Time  
9
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
A10  
A9  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
DQ8  
’27C/PC210A-10 100 ns  
’27C/PC210A-12 120 ns  
’27C/PC210A-15 150 ns  
’27C/PC210A-20 200 ns  
’27C/PC210A-25 250 ns  
GND  
GND  
A8  
DQ7  
DQ6  
DQ5  
DQ4  
DQ3  
DQ2  
DQ1  
DQ0  
G
A7  
A6  
A5  
A4  
16-Bit Output For Use in  
Microprocessor-Based Systems  
A3  
A2  
Very High-Speed SNAP! Pulse  
Programming  
A1  
A0  
Power-Saving CMOS Technology  
3-State Output Buffers  
FN PACKAGE  
(TOP VIEW)  
400-mV Minimum DC Noise Immunity With  
Standard TTL Loads  
Latchup Immunity of 250 mA on All Input  
and Output Pins  
6
5
4
3
2 1 44 43 42 41 40  
7
A13  
A12  
A11  
A10  
A9  
DQ12  
DQ11  
DQ10  
DQ9  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
No Pullup Resistors Required  
8
9
Low Power Dissipation  
10  
11  
12  
13  
14  
15  
16  
17  
– Active . . . 275 mW Worst Case  
– Standby . . . 0.55 mW Worst Case  
(CMOS-Input Levels)  
DQ8  
GND  
NC  
A8  
GND  
NC  
DQ7  
DQ6  
DQ5  
DQ4  
Temperature Range Options  
A7  
A6  
PIN NOMENCLATURE  
A5  
A0A15  
DQ0DQ15  
E
Address Inputs  
Inputs (programming)/Outputs  
Chip Enable  
18 19 20 21 22 23 24 25 26 27 28  
G
Output Enable  
GND  
NC  
PGM  
Ground  
No Internal Connection  
Program  
V
CC  
V
PP  
5-V Power Supply  
13-V Power Supply  
Pins 11 and 30 (J package) and pins 12 and 34 (FN  
package) must be connected externally to ground.  
Only in program mode  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1997, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251–1443  

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