TLC2810Z, TLC2810Y
LinCMOS PRECISION
DUAL OPERATIONAL AMPLIFIERS
SLOS120A – AUGUST 1993 – REVISED AUGUST 1994
Trimmed Input Offset Voltage:
10 mV Max at 25°C, V = 5 V
Low Noise . . . 25 nV/√Hz Typ at f = 1 kHz
DD
Output Voltage Range Includes Negative
Rail
Input Offset Voltage Drift Typically
0.1 µV/Month, Including the First 30 Days
12
High Input Impedance . . . 10 Ω Typ
Wide Range of Supply Voltages Over
Specified Temperature Range:
–40°C to 150°C . . . 4 V to 16 V
ESD-Protection Circuitry
Small-Outline Package Option Also
Available in Tape and Reel
Single-Supply Operation
Designed-In Latch-Up Immunity
Common-Mode Input Voltage Range
Extends to the Negative Rail
D OR P PACKAGE
(TOP VIEW)
description
1OUT
1IN–
1IN+
GND
V
DD
1
2
3
4
8
7
6
5
The TLC2810Z dual operational amplifiers
combine low offset voltage drift with high input
impedance, low noise, and speeds approaching
that ofgeneral-purposeJFETdevices. Inaddition,
the use of Texas Instruments silicon-gate
LinCMOS technology assures offset stability that
greatly exceeds the stability available with
conventional metal-gate processes.
2OUT
2IN–
2IN+
The high input impedance, low bias current, and high slew rate make the TLC2810Z ideal for applications that
have previously been reserved for JFET and NFET products. These advantages, in combination with an upper
operating temperature of 150°C, make the TLC2810Z an ideal choice for precision, extremely high-temperature
applications.
In general, many features associated with bipolar technology are available on the TLC2810Z without the power
penalties of bipolar technology. General applications such as transducer interfacing, analog calculations,
amplifier blocks, active filters, and signal buffering are designed easily with the TLC2810Z.
The TLC2810Z package options include a small-outline version for high-density system applications.
The device inputs and outputs are designed to withstand –100-mA surge currents without sustaining latch-up
at 25°C. The TLC2810Z incorporates internal ESD-protection circuits that prevent functional failures atvoltages
up to 2000 V as tested under MIL-STD 883C, Method 3015.2. However, care should be exercised in handling
the TLC2810Z as exposure to ESD may result in the degradation of the device parametric performance.
Additional care should be exercised to prevent V
supply line transients under power conditions. Transients
DD
of greater than 20 V can trigger the ESD-protection structure, inducing a low-impedance path to GND. Should
this condition occur, the sustained current supplied to the device must be limited to 100 mA or less. Failure to
do so can result in a latched condition and device failure.
The TLC2810Z is characterized for operation over the extended temperature range from –40°C to 150°C.
AVAILABLE OPTIONS
PACKAGED DEVICES
SMALL OUTLINE PLASTIC DIP
CHIP
FORM
(Y)
T
A
†
(D)
(P)
–40°C to 150°C
TLC2810ZD
TLC2810ZP
TLC2810Y
†
The D packages are available taped and reeled. Add R suffix to the device type when
ordering (e.g., TLC2810ZDR).
LinCMOS is a trademark of Texas Instruments Incorporated.
Copyright 1994, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265