ꢀꢁ ꢂꢃ ꢄꢅ ꢅꢆ
ꢇꢈ ꢉꢇ ꢊꢋ ꢌꢍ ꢎꢌ ꢏꢆꢐ ꢂꢋ ꢊꢇ ꢆꢑꢋ ꢁ ꢎꢂ ꢒꢋ ꢓ ꢁꢎ ꢎ ꢊ
SLES149 − OCTOBER 2005
D
VCO (Voltage-Controlled Oscillator):
D
Independent VCO, PFD Power-Down Mode
Thin Small-Outline Package (14 Terminal)
CMOS Technology
D
D
D
− Complete Oscillator Using Only One
External Bias Resistor (RBIAS)
Pin Compatible TLC2933IPW
− Lock Frequency:
30 MHz to 55 MHz (VDD = 3 V +5%,
T = –205C to 755C, x1 Output)
A
14-PIN TSOP (PW PACKAGE)
(TOP VIEW)
30 MHz to 60 MHz (VDD = 3.3 V +5%,
T = –205C to 755C, x1 Output)
A
LOGIC V
1
2
3
4
5
6
7
VCO V
RBIAS
VCO IN
VCO GND
VCO INHIBIT
PFD INHIBIT
TEST
14
13
12
11
10
9
43 MHz to 110 MHz (VDD = 5 V +5%,
DD
DD
SELECT
VCO OUT
FIN−A
T = –205C to 755C, x1 Output)
A
− Selectable Output Frequency
D
PFD (Phase Frequency Detector):
High Speed, Edge-Triggered Detector
with Internal Charge Pump
FIN−B
PFD OUT
LOGIC GND
8
description
The TLC2933A is designed for phase-locked loop (PLL) systems and is composed of a voltage-controlled
oscillator (VCO) and an edge-triggered type phase frequency detector (PFD). The oscillation frequency range
of the VCO is set by an external bias resistor (R
). The VCO has a 1/2 frequency divider at the output stage.
BIAS
The high speed PFD with internal charge pump detects the phase difference between the reference frequency
input and signal frequency input from the external counter. Both the VCO and the PFD have inhibit functions,
which can be used as power-down mode. Due to the TLC2933A high speed and stable oscillation capability,
the TLC2933A is suitable for use as a high-performance PLL.
AVAILABLE OPTIONS
PACKAGE
T
A
SMALL OUTLINE (PW)
–20°C to 75°C
TLC2933AIPW
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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ꢣꢠ ꢡ ꢗ ꢧꢘ ꢢꢥ ꢝ ꢡ ꢠ ꢚꢙ ꢣꢠ ꢦ ꢠ ꢨꢚ ꢢꢜꢠ ꢘꢞꢩ ꢂ ꢥꢝ ꢛꢝ ꢟꢞ ꢠꢛ ꢗꢡ ꢞꢗ ꢟ ꢣꢝ ꢞꢝ ꢝꢘ ꢣ ꢚꢞ ꢥꢠꢛ
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Copyright 2005, Texas Instruments Incorporated
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