DDR Termination Regulator
TJ2995
FEATURES
SOP8 / SOP8-PP PKG
z Low Output Voltage Offset
z Works with +5V, +3.3V, and 2.5V Rails
z Source and Sink Current
z Low External Component Count
z No External Resistors Required
z Linear Topology
z Available in SOP8, SOP8-PP Package
z Low Cost and Easy to Use
APPLICATION
ORDERING INFORMATION
z
z
DDR-I and DDR-II Termination Voltage
SSTL-2 and SSTL-3 Termination
Device (Marking)
Package
SOP8
TJ2995D
SOP8-PP
TJ2995DP
DESCRIPSION
The TJ2995 linear regulator is designed to meet the JEDEC SSTL-2 and SSTL-3 specifications for termination
of DDR-SDRAM. The device contains a high-speed operational amplifier to provide excellent response to load
transient. This device can deliver 1.5A continuous current and transient peaks up to 3A in the application as
required for DDR-SDRAM termination. With an independent VSENSE pin, the TJ2995 can provide superior load
regulation. The TJ2995 provides a VREF output as the reference for the chipset and DDR DIMMS. The TJ2995
can easily provide the accurate VTT and VREF voltages without external resistors that PCB areas can be
reduced. The quiescent current is low to meet the low power consumption applications.
Absolute Maximum Ratings
CHARACTERISTIC
SYMBOL
MIN.
MAX.
UNIT
V
PVIN
AVIN
VDDQ
-0.3
-0.3
-0.3
6.0
6.0
6.0
Supply Voltage to GND
Lead Temperature (Soldering, 10 sec)
Storage Temperature Range
TSOL
TSTG
260
150
125
℃
℃
℃
-65
-40
Operating Junction Temperature Range
TJOPR
Recommended Operation Range
CHARACTERISTIC
AVIN to GND
SYMBOL
AVIN
MIN.
2.3
0
MAX.
5.5
UNIT
V
V
PVIN to GND
PVIN
AVIN
Ordering Information
Package
Order No.
TJ2995D
TJ2995DP
Description
Package Marking
TJ2995
Supplied As
SOP8
DDR Termination Regulator
DDR Termination Regulator
Reel
Reel
SOP8-PP
TJ2995
Oct. 2009 - Rev. 1.1
1/9
HTC