Datasheet > TJ2132

TJ2132

更新时间： 2024-09-14 01:13:55

品牌	Logo	应用领域
韩国泰进 - HTC		/
页数	文件大小	规格书
13页	1904K
描述
2.0A Low Output Voltage Ultra LDO Regulator

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中文翻译

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数据手册

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TJ2132 数据手册

2.0A Low Output Voltage Ultra LDO Regulator

TJ2132

FEATURES

 Works with 1.1V ~ 5.5V V_IN

 Ultra Low Dropout Voltage

 Low Quiescent Current

SOP8-PP

 Excellent Line and Load Regulation

 Guaranteed Output Current of 2.0A

 Adjustable Output Voltage Down to 0.6V

 V_OUTPower OK Signal

 Programmable Soft-Start

 Logic Controlled Shutdown Option

 Over-Temperature/Over-Current Protection

 -40℃ to 125℃ Junction Temperature Range

DFN 3x3-8L

APPLICATION

 Motherboards and Graphic Cards

 Microprocessor and Chipset Power Supplies

 Peripheral Cards

 Low Voltage Digital ICs

 High Efficiency Linear Regulators

 SMPS Post Regulators

DESCRIPSION

The TJ2132 is a 2.0A high performance ultra low-dropout

ORDERING INFORMATION

linear regulator ideal for powering core voltages of low-

power microprocessors. The TJ2132 implements a dual

supply configuration allowing for very low output

impedance. The TJ2132 requires a bias input supply and a

main input supply, allowing for ultra-low input voltages on

the main supply rail. The input supply operates from 1.1V

to 5.5V and the bias supply requires between 2.7V and 5.5V

for proper operation. The Soft-Start reduces inrush current

of the load capacitors and minimizes stress on the input

power source during start-up. The TJ2132 delivers high

current and ultra-low-dropout output voltage as low as 0.6V

for applications where V_OUTis very close to V_IN. The TJ2132

is developed on a CMOS technology which allows low

quiescent current operation independent of output current.

This technology also allows the TJ2132 to operate under

extremely low dropout conditions.

Device

Package

SOP8-PP

TJ2132GDP

DFN 3x3-8L

TJ2132GQ

OPERATING RATINGS

CHARACTERISTIC

SYMBOL

MIN.

MAX.

UNIT

Recommend Operating Input Voltage

Recommend Operating Bias Voltage

Enable Input Voltage

V_IN

V_BIAS

1.1

V_OUT+2.1

5.5

125

V_EN

℃

Operating Junction Temperature Range

Package Thermal Resistance^*

^*Calculated from package in sill air, mounted to 2.6mm X 3.5mm(minimum foot print) 2 layer PCB without thermal vias per JESD51 standards.

T_JOPR

-40

℃/W

Ɵ_JA-SOP8-PP

Aug. 2014 – Rev.1.1.3

HTC

12 3 4 5 6 7...13

中文翻译

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