THS8133, THS8133A, THS8133B
TRIPLE 10-BIT, 80 MSPS VIDEO D/A CONVERTER
WITH TRI-LEVEL SYNC GENERATION
SLVS204C – APRIL 1999 – REVISED SEPTEMBER 2000
features
TQFP-48 PowerPAD PACKAGE
(TOP VIEW)
D
D
D
Triple 10-bit D/A Converters
Minimum 80 MSPS Operation
Direct Drive of Doubly-Terminated 75-Ω
Load Into Standard Video Levels
48 47 46 45 44 43 42 41 40 39 38 37
D
3×10 Bit 4:4:4, 2×10 Bit 4:2:2 or 1×10 Bit
4:2:2 (ITU-BT.656) Multiplexed YPbPr/GBR
Input Modes
36
35
34
33
32
31
30
29
28
27
26
25
GY0
GY1
GY2
GY3
GY4
GY5
GY6
GY7
GY8
GY9
CLK
BPb9
BPb8
BPb7
BPb6
BPb5
BPb4
BPb3
BPb2
BPb1
1
2
3
4
5
6
7
8
9
D
D
Bi-Level (EIA) or Tri-Level (SMPTE) Sync
Generation With 7:3 Video/Sync Ratio
Integrated Insertion of Sync-On-Green/
Luminance or Sync-On-All Channels
D
Configurable Blanking Level
Internal Voltage Reference
D
BPb0 10
applications
DV
DV
11
12
SS
SYNC_T
D
High-Definition Television (HDTV) Set-Top
Boxes/Receivers
DD
13 14 15 16 17 18 19 20 21 22 23 24
D
D
D
High-Resolution Image Processing
Desktop Publishing
Direct Digital Synthesis/I-Q Modulation
See ALSO: THS8134 (8 bit, pin-compatible)
description
The THS8133 is a general-purpose triple high-speed D/A converter (DAC) optimized for use in video/graphics
applications. The device operates from a 5-V analog supply and a 3-V to 5-V range digital supply. The THS8133
has a sampling rate up to 80 MSPS. The device consists of three 10-bit D/A converters and additional circuitry
for bi-level/tri-level sync and blanking level generation in video applications.
THS8133 is also well suited in applications where multiple well-matched and synchronously operating DACs
are needed; for example, I-Q modulation and direct-digital synthesis in communications equipment.
The current-steering DACs can be directly terminated in resistive loads to produce voltage outputs. The device
provides a flexible configuration of maximum output current drive. Its output drivers are specifically designed
to produce standard video output levels when directly connected to a single-ended doubly-terminated 75 Ω
coaxial cable. Full-scale video/sync are generated in a 7:3 ratio, compliant with SMPTE standards for GBR and
YPbPr signals.
Furthermore, the THS8133 can generate both a traditional bi-level sync or a tri-level sync signal, as per the
SMPTE standards, via a digital control interface. The sync signal is inserted on one of the analog output
channels (sync-on-green/luminance) or on all output channels. Also, a blanking control signal sets the outputs
to defined levels during the nonactive video window.
Finally the input format can be either 3×10 bit 4:4:4, 2×10 bit 4:2:2, or 1×10 bit 4:2:2. This enables a direct
interface to a wide range of video DSP/ASICs including parts generating ITU-BT.656 formatted output data.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
Copyright 2000, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
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