THS8135
TRIPLE 10-BIT, 240 MSPS VIDEO DAC WITH TRI-LEVEL SYNC AND VIDEO
(ITU-R.BT601)—COMPLIANT FULL SCALE RANGE
SLAS343A – MAY 2001 – REVISED JUNE 2002
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Bi-Level (EIA) or Tri-Level (SMPTE) Sync
Generation
features
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Triple 10-Bit D/A Converters
240-MSPS Operation
Integrated Sync-On-Green/Luminance or
Sync-On-All Composite Sync Insertion
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YPbPr/RGB Configurable Blanking Levels,
Correctly Positioned for Either Full
(0–1023) or Video (ITU–R.BT601) –
Compliant Input Code Ranges
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Internal Voltage Reference
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Low-Power Operation From 3.3-V Analog
and 1.8-V Digital Suply Levels
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Generic Triple DAC Mode for Non-Video
Applications
applications
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High-Definition Television (HDTV) Set-Top
Boxes/Receivers/Displays
Direct Drive of Double-Terminated 75-Ω
Load Into Standard Video Levels
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High-Resolution Image Processing
3x10 Bit 4:4:4, 2x10 Bit 4:2:2 or 1x10 Bit
4:2:2 (ITU–R.BT656) Multiplexed
YCbCr/GBR Input Data Formats
description
The THS8135 is a general-purpose triple high-speed D/A converter optimized for use in video/graphics
applications. The device operates from 3.3-V analog and 1.8-V digital supplies. The THS8135 performance is
assuredatasamplingrateupto240MSPS. TheTHS8135consistsofthree10-bitD/Aconvertersandadditional
circuitry for bi-level/tri-level sync and blanking level generation. By providing a dc offset for the lowest video
amplitude output in video DAC mode, the device can insert a (negative) bi-level or (negative/positive) tri-level
sync on either only the green/luminance (sync-on-green/sync-on-Y) channel or on all channels for video
applications. A generic DAC mode avoids this dc offset, making this device suitable for non-video applications
as well.
The THS8135 is a footprint-compatible functional upgrade to the THS8133. In addition, the THS8135 allows
a higher update rate for oversampled video digitizing for all PC graphics formats up to UXGA (1600x1200)
resolution at 85 Hz and all practical digital TV formats including HDTV. The support for oversampling
significantly reduces the complexity of the analog reconstruction filter required behind the DAC.
Standard video levels can be generated for the full 10-bit input code range. Alternatively, the same levels can
be reached from a reduced input code range compliant to the video sampling standard ITU-R.BT-601. In that
case, the full-scale range of the DAC is dependent on the RGB or YCbCr color space configuration of the device.
When configured for RGB operation, full video output swing is reached for input codes 64-940 on all channels.
When configured for YCbCr operation, code range 64-940 on Y and code range 64-960 on Cb and Cr channels
generate full output swing using internal amplitude scaling on these color components. The device provides
headroom to accommodate under-/over-shoot outside the ITU-R.BT601 range to allow the generation of
ITU-R.BT601 illegal colors or super-black / super-white levels.
A digital control input for insertion of a reference (blanking) level on the analog outputs is included. The
amplitudeoftheblankinglevelisconfigurableforeitherRGBorYPbPrcomponentoutputsandforfullorreduced
input code ranges. The inserted sync output amplitude(s) always has the required 7:3 ratio to the full-scale video
amplitude.
The current-steering DACs can be directly terminated in resistive loads to produce voltage outputs. The device
provides a flexible configuration of maximum output current drive. The devices output drivers have been
specifically designed to produce standard video output levels when directly connected to a single-ended
double-terminated 75-Ω coaxial cable.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2002, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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