Datasheet > THS8210PFP

THS8210PFP

更新时间： 2024-09-17 21:14:15

品牌	Logo	应用领域
德州仪器 - TI		商用集成电路
页数	文件大小	规格书
73页	2053K
描述
SPECIALTY CONSUMER CIRCUIT, PQFP80, POWER, PLASTIC, TQFP-80

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技术参数
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THS8210PFP 技术参数

生命周期：	Obsolete	零件包装代码：	QFP
包装说明：	HTFQFP,	针数：	80
Reach Compliance Code：	unknown	HTS代码：	8542.39.00.01
风险等级：	5.84	其他特性：	IT ALSO REQUIRES 1.8V SUPPLY
商用集成电路类型：	CONSUMER CIRCUIT	JESD-30 代码：	S-PQFP-G80
长度：	12 mm	功能数量：	1
端子数量：	80	最高工作温度：	70 °C
最低工作温度：		封装主体材料：	PLASTIC/EPOXY
封装代码：	HTFQFP	封装形状：	SQUARE
封装形式：	FLATPACK, HEAT SINK/SLUG, THIN PROFILE, FINE PITCH	认证状态：	Not Qualified
座面最大高度：	1.2 mm	最大供电电压 (Vsup)：	3.6 V
最小供电电压 (Vsup)：	3 V	表面贴装：	YES
温度等级：	COMMERCIAL	端子形式：	GULL WING
端子节距：	0.5 mm	端子位置：	QUAD
宽度：	12 mm	Base Number Matches：	1

THS8210PFP 数据手册

THS8200/8210

‘ALL-FORMAT’ OVERSAMPLED COMPONENT VIDEO/PC GRAPHICS D/A SYSTEM WITH

THREE 11 BIT DAC’S, CGMS DATA INSERTION AND 525P MACROVISION COPY

PROTECTION

SLES032—6/18/02 3:33 PM

•

Three 11-bit 205MSPS D/A Converters with

Integrated Bi-level/Tri-level Sync Insertion

Support for all ATSC Video formats (incl.

1080P) and PC Graphics Formats (up to

UXGA@75Hz)

Features

Input

•

Flexible 10/15/16/20/24/30 bit digital video input

interface with support for YCbCr or RGB data,

either 4:4:4 or 4:2:2 sampled

Video synchronization via Hsync, Vsync

dedicated inputs or via extraction of embedded

SAV/EAV codes acc. to ITU-R BT601 (SDTV) or

SMPTE274M/SMPTE296M (HDTV)

Video processing

•

Programmable clip/shift/multiply function for

operation with full-range or ITU-R BT601 video

range input data

•

Programmable digital fine-gain controller on

each analog output channel, for accurate

channel matching and programmable white-

balance control

•

Built-in 4:2:2 to 4:4:4 video interpolation filter

Built-in 2x oversampling SDTV/HDTV

interpolation filter for improved video

frequency characteristic

Fully-programmable digital color space

conversion circuit

Fully-programmable display timing generator

to supply all SDTV & HDTV composite sync

timing formats, progressive and interlaced.

Fully programmable Hsync/Vsync outputs.

VBI (Vertical Blanking Interval) override or data

pass-thru for VBI data transparency

Programmable CGMS Data Generation and

Insertion

General

•

Built-in video color bar test pattern generator

Fast mode I2C control interface

Configurable ‘master’ or ‘slave timing mode’

configuration modes allows the device to act

as a master timing source for requesting data

from e.g. video frame buffer. Alternatively can

slave to external timing master. (Master mode

only available for PC graphics output modes)

DAC and chip powerdown modes

•

Low-power 1.8/3.3V operation

80-pin Power-PAD^TMplastic quad flatpack

package with efficient heat dissipation and

small physical size.

•

Macrovision 525P component copy protection

generation (THS8210 only)

Applications

Output

•

Digital:

ITU-R BT.656 digital video output port

Analog:

•

DVD players

Digital TV / Interactive-TV/Internet Set-top

boxes

Personal Video Recorders

HDTV Display or Projection Systems

Digital Video Systems

•

Analog component output from software-

•

switcheable 700mV/1.3V compliant output

DACs @ 37.5 Ohm load

•

Programmable video/sync ratio (7:3 or 10:4)

Programmable video pedestal

Note: Macrovision is

Corporation, Sunnyvale, CA

registered trademark of Macrovision

PRODUCT PREVIEW information concerns products in the

formative or design phase of development. Characteristic data

and other specifications are design goals. Texas Instruments

reserves the right to change or discontinue these products

without notice.

•

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THS9000DRWR	TI	获取价格	50 MHz to 400 MHz CASCADEABLE AMPLIFIER
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