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TDA8757AHL/21 PDF预览

TDA8757AHL/21

更新时间: 2024-09-19 06:43:55
品牌 Logo 应用领域
恩智浦 - NXP 转换器
页数 文件大小 规格书
37页 908K
描述
IC 3-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP144, PLASTIC, HLQFP-144, Analog to Digital Converter

TDA8757AHL/21 数据手册

 浏览型号TDA8757AHL/21的Datasheet PDF文件第2页浏览型号TDA8757AHL/21的Datasheet PDF文件第3页浏览型号TDA8757AHL/21的Datasheet PDF文件第4页浏览型号TDA8757AHL/21的Datasheet PDF文件第5页浏览型号TDA8757AHL/21的Datasheet PDF文件第6页浏览型号TDA8757AHL/21的Datasheet PDF文件第7页 
TDA8757A  
Triple 8-bit ADC 205 Msps  
Rev. 01 — 22 March 2002  
Preliminary data  
1. General description  
The TDA8757A is a triple 8-bit ADC for the digitizing of large bandwidth RGB/YUV  
signals at a sampling rate up to 205 Msps.  
The IC supports display resolutions up to 1600 × 1200 (UXGA) at 75 Hz.  
The IC also includes a PLL that can be locked to the horizontal line frequency and  
generates the ADC clock. The PLL jitter is minimized for high resolution PC graphics  
applications. An external clock signal can also be used to clock the ADC.  
The outputs are available either on one port up to 110 Msps or on two ports up to  
205 Msps. The operating mode is selectable with the serial interface for either  
I2C-bus or 3-wire serial bus (3W-bus) operation.  
The clamp level, the gain and the other settings are controllable through the serial  
interface.  
2. Features  
Triple 8-bit ADC  
Sampling rate up to 205 Msps  
IC controllable by a serial interface which can be I2C-bus or 3W-bus, selected by a  
TTL input pin  
Three clamps for programming a clamping code from 63.5 to +64 in steps of  
12 LSB (RGB) and from +120 to +136 in steps of 12 LSB (YUV)  
Three controllable amplifiers: gain controlled through the serial interface to  
produce a full-scale resolution of 12 LSB peak-to-peak  
Amplifier bandwidth of 250 MHz  
Low gain variation with temperature  
PLL controllable with the serial interface to generate the ADC clock which can be  
locked to any line frequency of 15 to 150 kHz  
Integrated PLL divider  
Programmable phase clock adjustment cells  
Internal voltage regulators  
TTL compatible digital inputs and outputs  
Outputs on one port or demultiplexed on two ports; selectable with the serial  
interface  
Chip enable high-impedance ADC output  
Power-down mode  
1.7 W power dissipation  
Sync on green extractor.  

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