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TDA8002G

更新时间: 2024-10-27 22:49:55
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
28页 131K
描述
IC card interface

TDA8002G 数据手册

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Philips Semiconductors  
Product specification  
IC card interface  
TDA8002  
PINNING  
PIN  
TYPE A TYPE B TYPE G  
SYMBOL  
I/O  
DESCRIPTION  
XTAL1  
XTAL2  
I/OUC  
1
2
3
4
1
2
3
4
30  
31  
32  
1
I/O  
I/O  
I/O  
I/O  
crystal connection or input for external clock  
crystal connection  
data I/O line to and from microcontroller  
AUX1UC  
auxiliary line to and from microcontroller for synchronous  
applications  
AUX2UC  
5
2
I/O  
auxiliary line to and from microcontroller for synchronous  
applications  
ALARM  
ALARM  
5
6
3
4
O
O
open drain NMOS reset output for microcontroller (active LOW)  
6
open drain PMOS reset output for microcontroller (active  
HIGH)  
CLKSEL  
7
7
5
I
control input signal for CLK (LOW = XTAL oscillator;  
HIGH = STROBE input)  
CLKDIV1  
CLKDIV2  
STROBE  
CLKOUT  
DGND1  
AGND  
S2  
8
8
6
I
I
control input with CLKDIV2 for choosing CLK frequency  
control input with CLKDIV1 for choosing CLK frequency  
external clock input for synchronous applications  
clock output (see Table 1)  
9
9
7
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
10  
11  
12  
13  
14  
15  
16  
17  
18  
8
I
9
O
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
supply digital ground 1  
supply analog ground  
I/O  
capacitance connection for voltage doubler  
VDDA  
supply analog supply voltage  
S1  
I/O  
I/O  
I/O  
I/O  
I
capacitance connection for voltage doubler  
VUP  
output of voltage doubler (connect to 100 nF)  
data I/O line to and from card  
I/O  
AUX2  
PRES  
PRES  
AUX1  
CLK  
auxiliary I/O line to and from card  
active LOW card input presence contact  
active HIGH card input presence contact  
auxiliary I/O line to and from card  
clock to card output (C3) (see Table 1)  
card reset output (C2)  
19  
20  
21  
22  
23  
24  
25  
I
21  
22  
23  
24  
25  
I/O  
O
RST  
O
VCC  
O
supply for card (C1) (decouple with 100 nF)  
CMDVCC  
I
active LOW start activation sequence input from  
microcontroller  
RSTIN  
OFF  
26  
27  
26  
27  
25  
26  
I
card reset input from microcontroller  
O
open drain NMOS interrupt output to microcontroller (active  
LOW)  
MODE  
VDDD  
28  
28  
27  
28  
29  
I
operating mode selection input (HIGH = normal; LOW = sleep)  
supply digital supply voltage  
supply digital ground 2  
DGND2  
1997 Nov 04  
5

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