Datasheet > TC7WH240FK_09

TC7WH240FK_09

更新时间： 2024-11-16 12:22:59

品牌	Logo	应用领域
东芝 - TOSHIBA		/
页数	文件大小	规格书
7页	186K
描述
Dual Bus Buffer Inverted, 3-State Outputs

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数据手册

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TC7WH240FK_09 数据手册

TC7WH240FU/FK

TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic

TC7WH240FU,TC7WH240FK

Dual Bus Buffer Inverted, 3-State Outputs

Features

TC7WH240FU

•

High speed: t = 3.6ns (typ.) at V

= 5V, C = 15pF

CC L

Low power dissipation: I

= 2 μA (max) at Ta = 25°C

High noise immunity: V

5.5V Tolerant inputs.

= V

= 28% V

(min)

NIH

NIL

Balanced propagation delays: t

≈ t

pHL

pLH

Wide operating voltage range: V

= 2 to 5.5 V

Low Noise : V

= 0.8 V (max)

(SM8)

OLP

TC7WH240FK

Marking

SM8

US8

Product Name

Lot No.

H 2 4 0

W H

240

(US8)

Weight

SSOP8-P-0.65: 0.02 g (typ.)

SSOP8-P-0.50A: 0.01 g (typ.)

Absolute Maximum Ratings (Ta = 25°C)

Pin Assignment (top view)

Characteristics

Supply voltage

Symbol

Rating

Unit

−0.5 to 7.0

DC input voltage

DC output voltage

Input diode current

Output diode current

DC output current

−0.5 to V

+ 0.5

OUT

−20

±20 (Note 1)

±25

OUT

DC V /ground current

±50

300 (SM8)

200 (US8)

−65 to 150

260

Power dissipation

GND

Storage temperature

stg

°C

Lead temperature (10 s)

Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the

significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even

if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum

ratings and the operating ranges.

Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook

(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test

report and estimated failure rate, etc).

Note 1: V_OUT< GND, V_OUT> V_CC

2009-09-28

12 3 4 5 6 7

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