Datasheet > TC74HC4094AP_07

TC74HC4094AP_07

更新时间： 2022-04-23 23:00:11

品牌	Logo	应用领域
东芝 - TOSHIBA		存储
页数	文件大小	规格书
10页	499K
描述
CMOS Digital Integrated Circuit Silicon Monolithic 8-Bit Shift and Store Register (3-state)

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数据手册

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TC74HC4094AP_07 数据手册

TC74HC4094AP/AF/AFN

TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic

TC74HC4094AP,TC74HC4094AF,TC74HC4094AFN

8-Bit Shift and Store Register (3-state)

Note: xxxFN (JEDEC SOP) is not available in

Japan.

The TC74HC4094A is a high speed CMOS 8-BIT SHIFT AND

STROBE REGISTER fabricated with silicon gate C²MOS

TC74HC4094AP

technology.

It achieves the high speed operation similar to equivalent

LSTTL while maintaining the CMOS low power dissipation.

It consists of an 8-bit shift register and an 8-bit latch with

3-state output buffers. Data is shifted serially though the shift

output of the last stage (Qs) can be used to cascade several

devices. Data on the Qs output is transferred to a second output

(Q’s) on the following negative transition of the CK input. The

TC74HC4094AF

data in each stage of the shift register is provided to a

corresponding latch, on the negative going transition of the

STROBE input. When STROBE is held high, data propagates

through the latch to a 3-state output buffer. This buffer is

enabled when OUTPUT ENABLE input is set high.

All inputs are equipped with protection circuits against static

discharge or transient excess voltage.

Features

TC74HC4094AFN

•

High speed: f

= 73 MHz (typ.) at V

= 5 V

max

Low power dissipation: I

= 4 μA (max) at Ta = 25°C

High noise immunity: V

= V

= 28% V

(min)

NIH

NIL

Output drive capability: 10 LSTTL loads

Symmetrical output impedance: |I | = I

= 4 mA (min)

∼

−

Balanced propagation delays: t

pHL

pLH

•

Wide operating voltage range: V

(opr) = 2 to 6 V

•

Pin and function compatible with 4094B

Weight

DIP16-P-300-2.54A

SOP16-P-300-1.27A

SOL16-P-150-1.27

: 1.00 g (typ.)

: 0.18 g (typ.)

: 0.13 g (typ.)

Pin Assignment

2007-10-01

12 3 4 5 6 7...10

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