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TC74HC42AFN(ELP) PDF预览

TC74HC42AFN(ELP)

更新时间: 2024-11-12 13:14:31
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东芝 - TOSHIBA /
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TC74HC42AFN(ELP) 数据手册

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TC74HC42AP/AF/AFN  
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic  
TC74HC42AP,TC74HC42AF,TC74HC42AFN  
BCD to Decimal Decoder  
Note: xxxFN (JEDEC SOP) is not available in  
Japan.  
The TC74HC42A is a high speed CMOS BCD-to-DECIMAL  
DECODER fabricated with silicon gate C2MOS technology.  
It achieves the high speed operation similar to equivalent  
LSTTL while maintaining the CMOS low power dissipation.  
A BCD code applied to the four inputs (A-D) sets a low level at  
one of ten decoded outputs. A illegal BCD code such as eleven  
thru fifteen sets all outputs high. This device can be used as  
3-to-8 LINE DECODER when input D is held low.  
This device is useful for code conversion, address decoding,  
memory selection, multiplexing, or readout decoding.  
All inputs are equipped with protection circuits against static  
discharge or transient excess voltage.  
TC74HC42AP  
TC74HC42AF  
TC74HC42AFN  
Features  
High speed: t = 13 ns (typ.) at V  
= 5 V  
pd  
CC  
Low power dissipation: I  
= 4 μA (max) at Ta = 25°C  
CC  
High noise immunity: V  
= V  
= 28% V  
(min)  
NIH  
NIL  
CC  
Output drive capability: 10 LSTTL loads  
Symmetrical output impedance: |I | = I  
= 4 mA (min)  
OL  
OH  
Balanced propagation delays: t  
t
pHL  
pLH  
Wide operating voltage range: V  
(opr) = 2~6 V  
CC  
Pin and function compatible with 74LS42  
Pin Assignment  
Weight  
DIP16-P-300-2.54A  
SOP16-P-300-1.27A  
SOL16-P-150-1.27  
: 1.00 g (typ.)  
: 0.18 g (typ.)  
: 0.13 g (typ.)  
1
2007-10-01  

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