Datasheet > TC6215TG-G

TC6215TG-G

更新时间： 2024-09-16 21:19:39

品牌	Logo	应用领域
美国微芯 - MICROCHIP		开关光电二极管晶体管
页数	文件大小	规格书
5页	463K
描述
150V, 5ohm, 2 CHANNEL,N AND P-CHANNEL, Si, POWER, MOSFET

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TC6215TG-G 技术参数

是否Rohs认证：	符合	生命周期：	Active
包装说明：	SMALL OUTLINE, R-PDSO-G8	Reach Compliance Code：	compliant
ECCN代码：	EAR99	Factory Lead Time：	6 weeks
风险等级：	1.13	配置：	SEPARATE, 2 ELEMENTS WITH BUILT-IN DIODE
最小漏源击穿电压：	150 V	最大漏源导通电阻：	5 Ω
FET 技术：	METAL-OXIDE SEMICONDUCTOR	JESD-30 代码：	R-PDSO-G8
JESD-609代码：	e3	湿度敏感等级：	3
元件数量：	2	端子数量：	8
工作模式：	ENHANCEMENT MODE	封装主体材料：	PLASTIC/EPOXY
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE
峰值回流温度（摄氏度）：	260	极性/信道类型：	N-CHANNEL AND P-CHANNEL
认证状态：	Not Qualified	表面贴装：	YES
端子面层：	Matte Tin (Sn) - annealed	端子形式：	GULL WING
端子位置：	DUAL	处于峰值回流温度下的最长时间：	40
晶体管应用：	SWITCHING	晶体管元件材料：	SILICON
Base Number Matches：	1

TC6215TG-G 数据手册

TC6215

N- and P-Channel

Enhancement-Mode Dual MOSFET

Features

General Description

► Back to back gate-source Zener diodes

► Guaranteed R_DS(ON)at 4.0V gate drive

► Low threshold

The Supertex TC6215 consists of high voltage, low threshold N-channel

and P-channel MOSFETs in an 8-Lead SOIC (TG) package. Both

MOSFETs have integrated back to back gate-source Zener diode clamps

and guaranteed R_DS(ON)ratings down to 4.0V gate drive allowing them to

be driven directly with standard 5.0V CMOS logic.

► Low on-resistance

► Independent N- and P-channels

► Electrically isolated N- and P-channels

► Low input capacitance

These low threshold enhancement-mode (normally-off) transistors utilize

an advanced vertical DMOS structure and Supertex’s well-proven silicon-

gate manufacturing process. This combination produces devices with the

power handling capabilities of bipolar transistors and with the high input

impedance and positive temperature coefﬁcient inherent in MOS devices.

Characteristic of all MOS structures, these devices are free from thermal

runaway and thermally-induced secondary breakdown.

► Fast switching speeds

► Free from secondary breakdowns

► Low input and output leakage

Applications

► High voltage pulsers

► Ampliﬁers

► Buffers

Supertex’s vertical DMOS FETs are ideally suited to a wide range of

switching and amplifying applications where very low threshold voltage,

high breakdown voltage, high input impedance, low input capacitance,

and fast switching speeds are desired.

► Piezoelectric transducer drivers

► General purpose line drivers

► Logic level interfaces

Ordering Information

Package Option

BV_DSS/BV_DGS

R_DS(ON)(Max)

8-Lead SOIC

Device

N-Channel P-Channel N-Channel P-Channel

4.90x3.90mm body

1.75mm height (max)

1.27mm pitch

(V)

(Ω)

TC6215

TC6215TG-G

150

-150

4.0

7.0

-G indicates package is RoHS compliant (‘Green’)

Absolute Maximum Ratings

Parameter

Pin Conﬁguration

Value

BV_DSS

Drain-to-source voltage

Drain-to-gate voltage

BV_DGS

Gate-to-source voltage

±20V

8-Lead SOIC (TG)

Operating and storage temperature

Soldering temperature^*

-55°C to + 150°C

300°C

(top view)

Product Marking

Absolute Maximum Ratings are those values beyond which damage to the device

may occur. Functional operation under these conditions is not implied. Continuous

operation of the device at the absolute rating level may affect device reliability. All

voltages are referenced to device ground.

YY = Year Sealed

WW = Week Sealed

L = Lot Number

YYWW

C6215

Distance of 1.6mm from case for 10 seconds.

LLLL

= “Green” Packaging

Package may or may not include the following marks: Si or

8-Lead SOIC (TG)

● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com

12 3 4 5

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