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TAS5760L PDF预览

TAS5760L

更新时间: 2024-09-16 12:30:23
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57页 1809K
描述
Check for Samples: TAS5760L

TAS5760L 数据手册

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DAP-32  
11mm ´ 8.1mm  
DCA-48  
12.5mm ´ 8.1mm  
TAS5760L  
www.ti.com  
SLOS782 JULY 2013  
General Purpose I2S Input Class D Amplifier  
Check for Samples: TAS5760L  
1
FEATURES  
2
Audio I/O Configuration:  
– SNR = 100 dB A-Wtd (Ref. to THD+N = 1%)  
Single Stereo I²S Input  
APPLICATIONS  
Stereo Bridge Tied Load (BTL) or Mono  
Parallel Bridge Tied Load (PBTL) Operation  
LCD/LED TV and Multi-Purpose Monitors  
Sound Bars, Docking Stations, PC Audio  
General Purpose Audio Equipment  
32, 44.1, 48, 88.2, 96 kHz Sample Rates  
General Operational Features:  
Selectable Hardware or Software Control  
Integrated Digital Output Clipper  
Power at 10% THD+N vs PVDD  
40  
Programmable I²C Address (1101100[R/W] or  
THD+N = 10%  
RL = 4  
35  
30  
25  
20  
15  
10  
5
1101101[R/W])  
RL = 6 Ω  
RL = 8 Ω  
4 Thermal Limit  
6 Thermal Limit  
8 Thermal Limit  
Closed Loop Amplifier Architecture  
Adjustable Switching Frequency for  
Speaker Amplifier  
Robustness Features:  
Clock Error, DC and Short Circuit  
Protection  
Over Temperature and Programmable  
Overcurrent Protection  
0
4
6
8
10  
12  
14  
16  
Audio Performance (PVDD = 12V, RSPK = 8Ω,  
Supply Voltage (V)  
G001  
SPK_GAIN[1:0] Pins = 01)  
NOTE: Thermal Limits were determined via the  
TAS5760xxEVM  
Idle Channel Noise = 65 µVrms (A-Wtd)  
THD+N = 0.09 % (at 1 W, 1 kHz)  
DVDD  
ANA_REG  
AVDD  
PVDD  
GVDD_REG  
Internal  
Voltage  
Supplies  
Internal Reference  
Regulators  
Internal Gate  
Drive Regulator  
Closed Loop Class D Amplifier  
SFT_CLIP  
Full Bridge  
Power Stage  
A
Digital to  
PWM  
Conversion  
SPK_OUTA+  
SPK_OUTA-  
SPK_OUTB+  
SPK_OUTB-  
Digital  
Boost  
&
Volume  
Control  
Gate  
Drives  
MCLK  
SCLK  
LRCK  
SDIN  
Serial  
Audio  
Port  
Over-  
Current  
Protection  
Digital  
Clipper  
Soft  
Clipper  
Gate  
Full Bridge  
Power Stage  
B
Analog  
Gain  
Drives  
Clock Monitoring  
Die  
Temp. Monitor  
Internal Control Registers and State Machines  
SPK_GAIN0 SPK_GAIN1  
SPK_SLEEP/ FREQ/  
SPK_SD SPK_FAULT  
PBTL/  
SCL  
ADR  
SDA  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
All trademarks are the property of their respective owners.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2013, Texas Instruments Incorporated  

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