Datasheet > TA5G-6.400MHZ

TA5G-6.400MHZ

更新时间： 2024-09-17 19:47:19

品牌	Logo	应用领域
CONNOR-WINFIELD		/
页数	文件大小	规格书
2页	170K
描述
Oscillator

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中文翻译

获取价格

数据手册

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TA5G-6.400MHZ 数据手册

Model TA5G

5.0x7.0mm

Surface Mount TCXO

Description

TA5G 0706

10MHz

2111 Comprehensive Drive

Aurora, Illinois 60505

Phone: 630-851-4722

Fax: 630-851-5040

The Connor Winfield model TA5G is a

5x7mm Surface Mount Temperature

Compensated Crystal Controlled

Oscillators (TCXO) with a Tri-State

LVCMOS output. The TA5G is

Features

TCXO

3.3V Operation

LVCMOS Output Logic

designed for applications requiring

high frequency stability, low jitter over

the commercial temperature range.

The RoHS compliant, surface mount

package is design for high-density

mounting and is optimum for mass

production.

Frequency Stability: ±2.50ppm

Temperature Range: 0 to 70°C

Low Jitter <1pS RMS

www.conwin.com

US Headquarters

630-851-4722:

Tri-State Enable/Disable Function

Surface Mount Package

European Headquarters:

+353-61-472221

Tape and Reel Packing

RoHS Compliant / Lead Free

ABSOLUTE MAXIMUM RATINGS

TABLE 1

PARAMETER

UNITS

MINIMUM NOMINAL MAXIMUM

-55 125

-0.5 6.0

UNITS

°C

NOTE

Storage Temperature

Supply Voltage

(Vcc)

Vdc

OPERATING SPECIFICATIONS

TABLE 2

NOTE

PARAMETER

MINIMUM NOMINAL MAXIMUM

UNITS

MHz

Frequency Range

6.4

1.00

2.50

Frequency Calibration @ 25°C

Frequency Stability

-1.00

ppm

-2.50

ppm

Operating Temperature Range

Aging First Year

°C

-1.00

1.00

±0.2

3.465

ppm

Aging Per Year

-1.00

ppm

Supply Voltage Variation.

Load Coefficient, ±5pF

Supply Voltage

ppm

(Vcc)

(Icc)

3.135

3.3

Vdc

Supply Current

Jitter (BW=10Hz to 20MHz)

Jitter (BW=12kHz to 20MHz)

SSB Phase Noise at 10Hz offset

SSB Phase Noise at 100Hz offset

SSB Phase Noise at 1KHz offset

SSB Phase Noise at >10KHz offset

ps rms

dBc/Hz

-80

-110

-135

-150

INPUT CHARACTERISTICS for ENABLE / DISABLE FUNCTION (Pin 8)

TABLE 3

NOTE

PARAMETER

MINIMUM NOMINAL MAXIMUM

70% Vdd

UNITS

Vdc

Enable Voltage (High) or open circuit

Disable Voltage (Low) Output Tri-stated

(Vih)

(Vil)

30% Vdd

Vdc

LVCMOS OUTPUT CHARACTERISTICS

TABLE 4

NOTE

PARAMETER

MINIMUM NOMINAL MAXIMUM

UNITS

LOAD

Voltage

(High)

(Low)

(High)

(Low)

(Voh)

(Vol)

(Ioh)

(Iol)

90%Vcc

Vdc

-4

10%Vcc

Current

Duty Cycle at 50% of Vcc

Rise / Fall Time 10% to 90%

Note:

Bulletin

Tx182

1) Initial calibration @ 25°C. Specifications at time of shipment after 48 hours of operation.

2) Frequency stability vs. change in temperature. [±(Fmax – Fmin)/2.Fo]

3) Leave Pad 8 unconnected if enable / disable function is not required. When tri-stated, the

output stage is disabled but the oscillator and compensation circuit are still active (current

consumption < 1 mA).

Page

1 of 2

Revision

Date

01 Feb 2007

中文翻译

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