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SY8809BLMGTR PDF预览

SY8809BLMGTR

更新时间： 2024-11-05 14:45:03
品牌 Logo 应用领域
麦瑞 - MICREL ATM异步传输模式电信电信集成电路
页数 文件大小 规格书
11页 376K
描述
ATM/SONET/SDH SUPPORT CIRCUIT, QCC16, LEAD FREE, MLF-16

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SY8809BLMGTR 技术参数

生命周期：Transferred零件包装代码：DFN
包装说明：HVQCCN,针数：16
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.82JESD-30 代码：S-XQCC-N16
JESD-609代码：e4长度：3 mm
功能数量：1端子数量：16
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：UNSPECIFIED封装代码：HVQCCN
封装形状：SQUARE封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
认证状态：Not Qualified座面最大高度：0.9 mm
标称供电电压：3.3 V表面贴装：YES
电信集成电路类型：ATM/SONET/SDH SUPPORT CIRCUIT温度等级：INDUSTRIAL
端子面层：NICKEL PALLADIUM GOLD端子形式：NO LEAD
端子节距：0.5 mm端子位置：QUAD
宽度：3 mmBase Number Matches：1

SY8809BLMGTR 数据手册

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SY88309BL  
3.3V, 2.7Gbps PECL Limiting Post Amplifier  
with Wide Signal-Detect Range  
General Description  
Features  
The SY88309BL low-power limiting post amplifiers are  
designed for use in fiber-optic receivers. These devices  
connect to typical transimpedance amplifiers (TIAs). The  
linear signal output from TIAs can contain significant  
amounts of noise and may vary in amplitude over time.  
The SY88309BL quantizes these signals and output  
PECL-level waveforms.  
• Signal Detect circuit optimized to detect a larger and  
wider input range (20mVPP-140mVPP)  
• Chatter-free Open-Collector TTL Signal-Detect (SD)  
• Single 3.3V power supply  
• 155Mbps to 2.7Gbps operation  
• Low-noise PECL data outputs  
• Programmable SD level set (SDLVL  
)
The SY88309BL operates from a single +3.3V power  
supply, over temperatures ranging from –40oC to +85oC.  
With their wide bandwidth and high gain, signals with  
data rates up to 2.7Gbps, and as small as 5mVPP, can  
be amplified to drive devices with CML or PECL inputs.  
• Available in a tiny 10-pin EPAD-MSOP and 16-pin  
MLF® package  
Applications  
It generates a Signal Detect (SD) open-collector TTL  
output. The SD function is optimized to detect a larger  
and wider input range, as shown in the characteristic  
curve on page 6. A programmable signal-detect level set  
pin (SDLVL) sets the sensitivity of the input amplitude  
detection.  
• PON  
• Gigabit Ethernet  
• 1X and 2X Fibre Channel  
• SONET/SDH:OC-3/12/24/48 – STM 1/4/8/16  
• High-gain line driver and line receiver  
SD asserts high if the input amplitude rises above the  
threshold sets by SDLVL and de-asserts low otherwise.  
The SD output can be fed back to the EN input to  
maintain stability. Typically, 3.5dB LOS/SD hysteresis is  
provided to prevent chattering.  
Markets  
• FTTX  
• Optical transceivers  
• Datacom/Telecom  
• Low-gain TIA interface  
• Long-reach FOM  
Datasheet and support documentation can be found on  
Micrel’s web site at: www.micrel.com.  
MLF and MicroLeadFrame are registered trademarks of Amkor Technolog  
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com  
M9999-082307-A  
hbwhelp@micrel.com or (408) 955-1690  
August 2007  
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