5秒后页面跳转
SY88149CLKGTR PDF预览

SY88149CLKGTR

更新时间: 2024-11-05 03:12:35
品牌 Logo 应用领域
麦瑞 - MICREL ATM集成电路SONET集成电路SDH集成电路电信集成电路电信电路放大器光电二极管异步传输模式
页数 文件大小 规格书
10页 281K
描述
3.3V, 1.25Gbps PECL LIMITING POST AMPLIFIER W/HIGH GAIN TTL SIGNAL DETECT

SY88149CLKGTR 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Transferred零件包装代码:MSOP
包装说明:TSSOP,针数:10
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.77JESD-30 代码:S-PDSO-G10
JESD-609代码:e4长度:3 mm
湿度敏感等级:1功能数量:1
端子数量:10最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:SQUARE
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
认证状态:Not Qualified座面最大高度:1.1 mm
标称供电电压:3.3 V表面贴装:YES
电信集成电路类型:ATM/SONET/SDH SUPPORT CIRCUIT温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:3 mm
Base Number Matches:1

SY88149CLKGTR 数据手册

 浏览型号SY88149CLKGTR的Datasheet PDF文件第2页浏览型号SY88149CLKGTR的Datasheet PDF文件第3页浏览型号SY88149CLKGTR的Datasheet PDF文件第4页浏览型号SY88149CLKGTR的Datasheet PDF文件第5页浏览型号SY88149CLKGTR的Datasheet PDF文件第6页浏览型号SY88149CLKGTR的Datasheet PDF文件第7页 
SY88149CL  
3.3V, 1.25Gbps PECL Limiting Post  
Amplifier w/High Gain TTL Signal Detect  
General Description  
Features  
The SY88149CL is a high-sensitivity limiting post  
amplifier designed for use in fiber-optic receivers. These  
devices connect to typical transimpedance amplifiers  
(TIAs). The linear signal output from TIAs can contain  
significant amounts of noise and may vary in amplitude  
over time. The SY88149CL quantizes these signals and  
outputs PECL level waveforms.  
Single 3.3V power supply  
Fast SD enable/disable time  
622Mbps to 1.25Gbps operation  
Low-noise PECL data outputs  
High-gain SD  
The SY88149CL operates from a single +3.3V power  
supply, over temperatures ranging from –40oC to +85oC.  
With its wide bandwidth and high gain, signals with data  
rates up to 1.25Gbps, and as small as 5mVpp, can be  
amplified to drive devices with PECL inputs.  
Chatter-free Open-Collector TTL signal detect (SD)  
output with internal 4.75kpull-up resistor  
TTL EN input  
Programmable SD level set (SDLVL  
)
Available in a tiny 10-pin MSOP package  
The SY88149CL generates a high-gain signal-detect  
(SD) open-collector TTL output. The SD function has a  
high gain input stage for increased sensitivity. A  
programmable Signal Detect level set pin (SDLVL) sets  
the sensitivity of the input amplitude detection. SD  
asserts high if the input amplitude rises above the  
threshold set by SDLVL and de-asserts low otherwise.  
The enable input (EN) de-asserts the true output signal  
without removing the input signal. The SD output can be  
fed back to the EN input to maintain output stability  
under a loss-of-signal condition. Typically, 3.4dB SD  
hysteresis is provided to prevent chattering.  
Applications  
GE-PON/GPON/EPON  
Gigabit Ethernet  
1062Mbps Fibre Channel  
OC-12/24 SONET/SDH  
High-gain line driver and line receiver  
Low-gain TIA interface  
Markets  
All support documentation can be found on Micrel’s web  
site at: www.micrel.com.  
FTTH/FTTP  
Datacom/Telecom  
Optical transceiver  
1
M9999-112205-A1  
hbwhelp@micrel.com or (408) 955-1690  
November 2005  

与SY88149CLKGTR相关器件

型号 品牌 获取价格 描述 数据表
SY88149CLKG-TR MICROCHIP

获取价格

ATM/SONET/SDH SUPPORT CIRCUIT, PDSO10
SY88149HAL MICREL

获取价格

1.25Gbps Burst-Mode Limiting Amplifier with Ultra-Fast Signal Assert Timing
SY88149HAL MICROCHIP

获取价格

The SY88149HAL is a high-sensitivity, burst-mode capable, limiting-post amplifier designed
SY88149HALMG MICREL

获取价格

1.25Gbps Burst-Mode Limiting Amplifier with Ultra-Fast Signal Assert Timing
SY88149HALMGTR MICREL

获取价格

ATM/SONET/SDH SUPPORT CIRCUIT, QCC16, 3 X 3 MM, LEAD FREE, QFN-16
SY88149HL MICREL

获取价格

3.3V 1.25Gbps Burst-Mode Limiting Amplifier with Ultra-Fast Signal Assert Timing
SY88149HL_10 MICREL

获取价格

3.3V 1.25Gbps Burst-Mode Limiting
SY88149HLMG MICREL

获取价格

3.3V 1.25Gbps Burst-Mode Limiting
SY88149HLMGTR MICREL

获取价格

3.3V 1.25Gbps Burst-Mode Limiting
SY88149ND MICROCHIP

获取价格

The SY88149NDL is a high-sensitivity, burst-mode capable limiting post amplifier designed