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SY100EPT23LZITR PDF预览

SY100EPT23LZITR

更新时间: 2024-11-05 21:22:03
品牌 Logo 应用领域
麦瑞 - MICREL 光电二极管接口集成电路锁存器
页数 文件大小 规格书
5页 66K
描述
PECL to TTL Translator, 2 Func, True Output, ECL100K, PDSO8, PLASTIC, SOIC-8

SY100EPT23LZITR 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:PLASTIC, SOIC-8
针数:8Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.13最大延迟:2.5 ns
接口集成电路类型:PECL TO TTL TRANSLATORJESD-30 代码:R-PDSO-G8
JESD-609代码:e0长度:4.93 mm
湿度敏感等级:1位数:1
功能数量:2端子数量:8
最高工作温度:85 °C最低工作温度:-40 °C
输出锁存器或寄存器:NONE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP8,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):240
电源:3.3 V认证状态:Not Qualified
座面最大高度:1.73 mm子类别:Level Translators
最大供电电压:3.6 V最小供电电压:3 V
标称供电电压:3.3 V表面贴装:YES
技术:ECL100K温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn85Pb15)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:3.94 mm
Base Number Matches:1

SY100EPT23LZITR 数据手册

 浏览型号SY100EPT23LZITR的Datasheet PDF文件第2页浏览型号SY100EPT23LZITR的Datasheet PDF文件第3页浏览型号SY100EPT23LZITR的Datasheet PDF文件第4页浏览型号SY100EPT23LZITR的Datasheet PDF文件第5页 
3.3V DUAL DIFFERENTIAL  
ECL Pro™  
SY100EPT23L  
LVPECL-to-LVTTL TRANSLATOR  
FEATURES  
3.3V power supply  
1.9ns typical propagation delay  
Maximum frequency > 275MHz  
Differential LVPECL inputs  
24mA LVTTL outputs  
ECL Pro™  
DESCRIPTION  
Flow-through pinouts  
The SY100EPT23L is a dual differential LVPECL-to-  
LVTTL translator. Because LVPECL (Low Voltage Positive  
ECL) levels are used, only +3.3V and ground are required.  
The tiny 8-pin MSOP and dual-gate design of the EPT23L  
makes it ideal for applications which require the  
translation of a clock and data signal.  
Internal input resistors: pulldown on D, pulldown  
and pullup on /D  
Q output will default LOW with inputs open or at  
Ground  
Available in 8-pin MSOP and SOIC packages  
The EPT23L is available in only the ECL 100K  
standard. Since there are no LVPECL outputs or an  
external V  
reference, the EPT23L does not require  
BB  
both ECL standard versions. The inputs can accept 10K  
voltage levels and any standard differential LVPECL input  
referenced from a V  
of +3.3V  
CC  
PIN CONFIGURATION/BLOCK DIAGRAM  
D0  
/D0  
/D1  
D1  
1
2
3
4
8
7
6
5
VCC  
Q0  
LVPECL  
LVTTL  
Q1  
GND  
(Available in 8-pin SOIC and 8-pin MSOP)  
PIN NAMES  
Pin  
Q0, Q1  
Function  
LVTTL Outputs  
Differential LVPECL Inputs  
Positive Supply  
Ground  
D0, /D0, D1, /D1  
VCC  
GND  
ECL Pro is a trademark of Micrel, Inc.  
Rev.: E  
Amendment: 0  
1
Issue Date: September 2003  

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