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SY100EL56V PDF预览

SY100EL56V

更新时间: 2024-11-28 22:42:35
品牌 Logo 应用领域
麦瑞 - MICREL 复用器
页数 文件大小 规格书
4页 58K
描述
5V/3.3V DUAL DIFFERENTIAL 2:1 MULTIPLEXER

SY100EL56V 数据手册

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5V/3.3V DUAL  
DIFFERENTIAL  
2:1 MULTIPLEXER  
SY100EL56V  
FEATURES  
DESCRIPTION  
3.3V and 5V power supply options  
440ps propagation delay  
The SY100EL56V is a dual, fully differential 2:1  
multiplexer. The differential data path makes the device  
ideal for multiplexing low skew clock or other skew  
sensitive signals. Multiple VBB pins are provided to ease  
AC coupling input signals.  
The device features both individual and common select  
inputs to address both data path and random logic  
applications.  
Separate and common select  
High bandwidth output transitions  
Internal 75Kinput pull-down resistors  
Available in 20-pin SOIC package  
The differential inputs have special circuitry which  
ensures device stability under open input conditions.  
When both differential inputs are left open the D input  
will pull down to VEE, the /D input will bias around VCC/2  
forcing the Q output LOW.  
PIN CONFIGURATION/BLOCK DIAGRAM  
TRUTH TABLE  
SEL  
H
Data  
a
b
20  
19  
18  
17  
D
0a  
0a  
1
2
3
4
5
6
7
8
9
V
Q
Q
CC  
L
D
0
VBB0  
0
D0b  
PIN NAMES  
SEL0  
16 COM_SEL  
15 SEL1  
D0b  
Pin  
Function  
D0a–D1a  
D0b–D1b  
SEL0–SEL1  
COM_SEL  
Q0–Q1  
Input Data a  
Input Data b  
D
1a  
D1a  
14  
13  
12  
11  
VCC  
Individual Select Input  
Common Select Input  
True Outputs  
VBB1  
Q
1
D1b  
Q
1
/Q0–/Q1  
Inverted Outputs  
D1b 10  
VEE  
SOIC  
TOP VIEW  
Rev.: C  
Amendment:/1  
Issue Date: May 2000  
1

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