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STPCC4EEBC PDF预览

STPCC4EEBC

更新时间: 2024-11-25 13:14:07
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 多功能外围设备微控制器和处理器外围集成电路PC时钟
页数 文件大小 规格书
93页 1403K
描述
MULTIFUNCTION PERIPHERAL, PBGA388, PLASTIC, BGA-388

STPCC4EEBC 技术参数

生命周期:Obsolete零件包装代码:BGA
包装说明:BGA,针数:388
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.82Is Samacsys:N
地址总线宽度:32边界扫描:YES
总线兼容性:PCI; ISA最大时钟频率:14.318 MHz
外部数据总线宽度:32JESD-30 代码:S-PBGA-B388
长度:35 mm端子数量:388
最高工作温度:85 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:BGA
封装形状:SQUARE封装形式:GRID ARRAY
认证状态:Not Qualified座面最大高度:2.38 mm
最大供电电压:2.7 V最小供电电压:2.45 V
标称供电电压:2.5 V表面贴装:YES
技术:CMOS温度等级:OTHER
端子形式:BALL端子节距:1.27 mm
端子位置:BOTTOM宽度:35 mm
Base Number Matches:1

STPCC4EEBC 数据手册

 浏览型号STPCC4EEBC的Datasheet PDF文件第2页浏览型号STPCC4EEBC的Datasheet PDF文件第3页浏览型号STPCC4EEBC的Datasheet PDF文件第4页浏览型号STPCC4EEBC的Datasheet PDF文件第5页浏览型号STPCC4EEBC的Datasheet PDF文件第6页浏览型号STPCC4EEBC的Datasheet PDF文件第7页 
®
STPC CONSUMER-II  
X86 Core PC Compatible Information Appliance System-on-Chip  
POWERFUL x86 PROCESSOR  
64-BIT SDRAM UMA CONTROLLER  
VGA & SVGA CRT CONTROLLER  
135 MHz RAMDAC  
2D GRAPHICS ENGINE  
VIDEO INPUT PORT  
VIDEO PIPELINE  
- UP-SCALER  
- VIDEO COLOUR SPACE CONVERTER  
- CHROMA & COLOUR KEY SUPPORT  
PBGA388  
TV OUTPUT  
- THREE-LINE FLICKER FILTER  
- ITU-R 601/656 SCAN CONVERTER  
- NTSC / PAL COMPOSITE, RGB, S-VIDEO  
Figure 0-1. Logic Diagram  
PCI MASTER / SLAVE / ARBITER  
ISA MASTER / SLAVE  
Host x86  
I/F  
Core  
OPTIONAL 16-BIT LOCAL BUS INTERFACE  
EIDE CONTROLLER  
PCI Bus  
PCI  
m/s  
PMU  
I²C INTERFACE  
IPC  
IDE  
I/F  
ISA  
m/s  
PCI  
m/s  
IPC  
- DMA CONTROLLER  
- INTERRUPT CONTROLLER  
- TIMER / COUNTERS  
ISA Bus  
LB  
CTR  
Local Bus  
POWER MANAGEMENT UNIT  
JTAG IEEE1149.1  
Video  
Pipeline  
DESCRIPTION  
C Key  
K Key  
LUT  
Monitor  
The STPC Consumer-II integrates a standard 5th  
generation x86 core, a Synchronous DRAM  
controller, a graphics subsystem, a video pipeline,  
and support logic including PCI, ISA, and IDE  
SVGA  
CRTC  
TVO  
Cursor  
GE  
TV  
Encoder  
controllers to provide  
a
single consumer  
orientated PC compatible subsystem on a single  
device.  
VIP  
The device is based on a tightly coupled Unified  
Memory Architecture (UMA), sharing memory  
between the CPU, the graphics and the video.  
SDRAM  
CTRL  
JTAG  
The STPC Consumer-II is packaged in a 388  
Plastic Ball Grid Array (PBGA).  
Release 1.5 - January 29, 2002  
1/93  

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