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STPCD0166BTC3 PDF预览

STPCD0166BTC3

更新时间: 2024-11-24 22:40:23
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 多功能外围设备微控制器和处理器外围集成电路微处理器PC时钟
页数 文件大小 规格书
48页 762K
描述
PC Compatible Embedded Microprocessor

STPCD0166BTC3 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:BGA包装说明:PLASTIC, BGA-388
针数:388Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.86
Is Samacsys:N其他特性:0 TO 100 OPERATING CASE TEMPERATURE
地址总线宽度:32位大小:32
边界扫描:NO总线兼容性:PCI; ISA
最大时钟频率:14.318 MHz外部数据总线宽度:32
JESD-30 代码:S-PBGA-B388JESD-609代码:e0
长度:35 mm端子数量:388
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:BGA
封装等效代码:BGA388,26X26,50封装形状:SQUARE
封装形式:GRID ARRAY峰值回流温度(摄氏度):NOT SPECIFIED
电源:3.3 V认证状态:Not Qualified
座面最大高度:2.38 mm速度:66 MHz
子类别:Microprocessors最大供电电压:3.6 V
最小供电电压:3 V标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:BALL端子节距:1.27 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:35 mmuPs/uCs/外围集成电路类型:MICROPROCESSOR, RISC
Base Number Matches:1

STPCD0166BTC3 数据手册

 浏览型号STPCD0166BTC3的Datasheet PDF文件第2页浏览型号STPCD0166BTC3的Datasheet PDF文件第3页浏览型号STPCD0166BTC3的Datasheet PDF文件第4页浏览型号STPCD0166BTC3的Datasheet PDF文件第5页浏览型号STPCD0166BTC3的Datasheet PDF文件第6页浏览型号STPCD0166BTC3的Datasheet PDF文件第7页 
STPC CLIENT  
PC Compatible Embedded Microprocessor  
POWERFUL X86 PROCESSOR  
64-BIT 66MHz BUS INTERFACE  
64-BIT DRAM CONTROLLER  
SVGA GRAPHICS CONTROLLER  
UMA ARCHITECTURE  
VIDEO SCALER  
VIDEO OUTPUT PORT  
VIDEO INPUT PORT  
CRT CONTROLLER  
135MHz RAMDAC  
PBGA388  
2 OR 3 LINE FLICKER FILTER  
SCAN CONVERTER  
Figure 1. Logic Diagram  
PCI MASTER / SLAVE / ARBITER  
ISA MASTER/SLAVE  
ISABUS  
IDE CONTROLLER  
x86  
Core  
DMA CONTROLLER  
ISA  
PCI  
IPC  
EID  
INTERRUPT CONTROLLER  
TIMER / COUNTERS  
Host I/F  
POWER MANAGEMENT  
EIDE  
PCI BUS  
CCIRInput  
STPC CLIENT OVERVIEW  
PCI  
VIP  
The STPC Client integrates a standard 5th  
generation x86 core, a DRAM controller, a  
graphics subsystem, a video pipeline, and  
support logic including PCI, ISA, and IDE  
controllers to provide  
orientated PC compatible subsystem on a single  
device.  
TV Output  
a
single Consumer  
Anti-  
Col-  
The device is based on a tightly coupled Unified  
Memory Architecture (UMA), sharing the same  
memory array between the CPU main memory  
and the graphics and video frame buffers.  
Extra facilities are implemented to handle video  
streams. Features include smooth scaling and  
colour space conversion of the video input stream  
and mixing of the video stream with non-video  
data from the frame buffer. The chip also includes  
anti-flicker filters to provide a stable, high-quality  
Digital TV output.  
Vid-  
2D  
Col-  
our  
Monitor  
HW  
CRT  
SYNCOutput  
DRAM  
The STPC Client is packaged in a 388 Plastic Ball  
Grid Array (PBGA).  
February 8, 2000  
Issue 1.7  
1/48  

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