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STPCE1EEBC PDF预览

STPCE1EEBC

更新时间: 2024-11-24 22:30:11
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 多功能外围设备微控制器和处理器外围集成电路PC时钟
页数 文件大小 规格书
87页 1354K
描述
X86 Core General Purpose PC Compatible System - on - Chip

STPCE1EEBC 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:BGA包装说明:PLASTIC, BGA-388
针数:388Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.89
Is Samacsys:N地址总线宽度:32
位大小:32边界扫描:YES
总线兼容性:PCI; ISA最大时钟频率:14.318 MHz
外部数据总线宽度:32JESD-30 代码:S-PBGA-B388
JESD-609代码:e0长度:35 mm
I/O 线路数量:16端子数量:388
最高工作温度:85 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:BGA
封装等效代码:BGA388,26X26,50封装形状:SQUARE
封装形式:GRID ARRAY峰值回流温度(摄氏度):NOT SPECIFIED
电源:2.5,3.3 V认证状态:Not Qualified
座面最大高度:2.38 mm速度:100 MHz
子类别:Microprocessors最大供电电压:2.7 V
最小供电电压:2.45 V标称供电电压:2.5 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL EXTENDED端子面层:Tin/Lead (Sn/Pb)
端子形式:BALL端子节距:1.27 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:35 mmuPs/uCs/外围集成电路类型:MICROPROCESSOR, RISC
Base Number Matches:1

STPCE1EEBC 数据手册

 浏览型号STPCE1EEBC的Datasheet PDF文件第2页浏览型号STPCE1EEBC的Datasheet PDF文件第3页浏览型号STPCE1EEBC的Datasheet PDF文件第4页浏览型号STPCE1EEBC的Datasheet PDF文件第5页浏览型号STPCE1EEBC的Datasheet PDF文件第6页浏览型号STPCE1EEBC的Datasheet PDF文件第7页 
STPC® ELITE  
X86 Core General Purpose PC Compatible System - on - Chip  
POWERFUL X86 PROCESSOR  
64-BIT SDRAM CONTROLLER AT 100MHz  
INTEGRATED PCI NORTH / SOUTH  
BRIDGE CONTROLLER  
ISA MASTER / SLAVE / DMA  
16-BIT LOCAL BUS INTERFACE FOR LOW  
COST AND EMBEDDED APPLICATIONS  
EIDE CONTROLLER  
INTEGRATED PERIPHERAL CONTROLLER  
- DMA CONTROLLER  
PBGA388  
- INTERRUPT CONTROLLER  
- TIMER / COUNTERS  
POWER MANAGEMENT UNIT  
I²C INTERFACE  
Logic Diagram  
16 ENHANCED GENERAL PURPOSE I/Os.  
JTAG IEEE1149.1  
x86  
Core  
PROGRAMMABLE OUTPUT CLOCK UP TO  
135MHz  
L.B.  
I/F  
LOCAL BUS  
Host I/F  
COMMERCIAL AND INDUSTRIAL TEM-  
PERATURE RANGES  
ISA BUS  
ISA  
I/F  
DESCRIPTION  
IPC  
The STPC Elite integrates a fully static x86  
processor up to 133 MHz, fully compatible with  
standard x86 processors, and combines it with  
powerful chipset to provide a general purpose PC  
compatible subsystem on a single device. The  
device is packaged in a 388 Ball Grid Array  
(PBGA).  
EIDE  
PCI  
EIDE  
ctrl  
PCI  
I/F  
PCI  
I/F  
The STPC Elite has a low voltage operation with  
V
= 2.5V and has 5V tolerant I/Os (3.3V  
CORE  
output levels).  
SDRAM  
PMU  
JTAG  
CONTROL  
Release 1.3 - January 29, 2002  
1/87  
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.  

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