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STPCELITE PDF预览

STPCELITE

更新时间: 2024-11-24 22:28:27
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS PC
页数 文件大小 规格书
87页 1354K
描述
X86 Core General Purpose PC Compatible System - on - Chip

STPCELITE 数据手册

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STPC® ELITE  
X86 Core General Purpose PC Compatible System - on - Chip  
POWERFUL X86 PROCESSOR  
64-BIT SDRAM CONTROLLER AT 100MHz  
INTEGRATED PCI NORTH / SOUTH  
BRIDGE CONTROLLER  
ISA MASTER / SLAVE / DMA  
16-BIT LOCAL BUS INTERFACE FOR LOW  
COST AND EMBEDDED APPLICATIONS  
EIDE CONTROLLER  
INTEGRATED PERIPHERAL CONTROLLER  
- DMA CONTROLLER  
PBGA388  
- INTERRUPT CONTROLLER  
- TIMER / COUNTERS  
POWER MANAGEMENT UNIT  
I²C INTERFACE  
Logic Diagram  
16 ENHANCED GENERAL PURPOSE I/Os.  
JTAG IEEE1149.1  
x86  
Core  
PROGRAMMABLE OUTPUT CLOCK UP TO  
135MHz  
L.B.  
I/F  
LOCAL BUS  
Host I/F  
COMMERCIAL AND INDUSTRIAL TEM-  
PERATURE RANGES  
ISA BUS  
ISA  
I/F  
DESCRIPTION  
IPC  
The STPC Elite integrates a fully static x86  
processor up to 133 MHz, fully compatible with  
standard x86 processors, and combines it with  
powerful chipset to provide a general purpose PC  
compatible subsystem on a single device. The  
device is packaged in a 388 Ball Grid Array  
(PBGA).  
EIDE  
PCI  
EIDE  
ctrl  
PCI  
I/F  
PCI  
I/F  
The STPC Elite has a low voltage operation with  
V
= 2.5V and has 5V tolerant I/Os (3.3V  
CORE  
output levels).  
SDRAM  
PMU  
JTAG  
CONTROL  
Release 1.3 - January 29, 2002  
1/87  
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.  

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