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STK12C68 PDF预览

STK12C68

更新时间: 2022-04-23 23:00:11
品牌 Logo 应用领域
SIMTEK 存储静态存储器
页数 文件大小 规格书
20页 526K
描述
8Kx8 AutoStore nvSRAM

STK12C68 数据手册

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STK12C68 (SMD5962-94599)  
Packages  
VCCX  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
VCAP 1  
2
3
4
A12  
A7  
A6  
A5  
A4  
A3  
A2  
A1  
A0  
W
HSB  
A8  
5
6
7
8
A9  
A11  
G
A10  
9
E
10  
DQ7  
DQ0 11  
18 DQ6  
12  
DQ5  
17  
DQ1  
DQ2  
VSS  
16  
15  
13  
14  
DQ4  
DQ3  
28-pin SOIC  
28-pin DIP  
28-pin LCC  
Pin Descriptions  
Pin Name  
I/O  
Description  
A
-A  
Input  
I/O  
Address: The 13 address inputs select one of 8,192 bytes in the nvSRAM array  
Data: Bi-directional 8-bit data bus for accessing the nvSRAM  
Chip Enable: The active low E input selects the device  
12  
0
DQ -DQ  
7
0
E
Input  
Input  
W
Write Enable: The active low W enables data on the DQ pins to be written to the address  
location latched by the falling edge of E  
G
Input  
Output Enable: The active low G input enables the data output buffers during read cycles.  
De-asserting G high caused the DQ pins to tri-state.  
V
Power Supply  
I/O  
Power: 5.0V, +10%, -10%  
CCX  
HSB  
Hardware Store Busy: When low this output indicates a Store is in progress. When pulled  
low external to the chip, it will initiate a nonvolatile STORE operation. A weak pull up resistor  
keeps this pin high if not connected. (Connection Optional).  
V
V
Power Supply  
Power Supply  
AutoStore Capacitor: Supplies power to nvSRAM during power loss to store data from  
SRAM to nonvolatile storage elements.  
CAP  
Ground  
SS  
Rev 0.7  
Document Control #ML0008  
February 2007  
2

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