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STK12C68-5C45M PDF预览

STK12C68-5C45M

更新时间: 2024-01-09 10:15:44
品牌 Logo 应用领域
其他 - ETC 内存集成电路静态存储器可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
13页 371K
描述
8K x 8 AutoStore⑩ nvSRAM QuantumTrap⑩ CMOS Nonvolatile Static RAM

STK12C68-5C45M 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:DIP, DIP28,.3Reach Compliance Code:unknown
ECCN代码:3A001.A.2.CHTS代码:8542.32.00.41
风险等级:5.21Is Samacsys:N
最长访问时间:45 ns其他特性:EEPROM HARDWARE/SOFTWARE STORE; SOFTWARE RECALL; RETENTION/ENDURANCE = 10 YEARS/100000 CYCLES
JESD-30 代码:R-CDIP-T28JESD-609代码:e0
长度:35.56 mm内存密度:65536 bit
内存集成电路类型:NON-VOLATILE SRAM内存宽度:8
功能数量:1端口数量:1
端子数量:28字数:8192 words
字数代码:8000工作模式:ASYNCHRONOUS
最高工作温度:125 °C最低工作温度:-55 °C
组织:8KX8输出特性:3-STATE
可输出:YES封装主体材料:CERAMIC, METAL-SEALED COFIRED
封装代码:DIP封装等效代码:DIP28,.3
封装形状:RECTANGULAR封装形式:IN-LINE
并行/串行:PARALLEL峰值回流温度(摄氏度):NOT APPLICABLE
电源:5 V认证状态:Not Qualified
筛选级别:38535Q/M;38534H;883B座面最大高度:4.14 mm
最大待机电流:0.004 A子类别:SRAMs
最大压摆率:0.08 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:MILITARY端子面层:Tin/Lead (Sn85Pb15)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT APPLICABLE
宽度:7.62 mmBase Number Matches:1

STK12C68-5C45M 数据手册

 浏览型号STK12C68-5C45M的Datasheet PDF文件第2页浏览型号STK12C68-5C45M的Datasheet PDF文件第3页浏览型号STK12C68-5C45M的Datasheet PDF文件第4页浏览型号STK12C68-5C45M的Datasheet PDF文件第5页浏览型号STK12C68-5C45M的Datasheet PDF文件第6页浏览型号STK12C68-5C45M的Datasheet PDF文件第7页 
STK12C68  
STK12C68-M SMD#5962-94599  
8K x 8 AutoStore™ nvSRAM  
QuantumTrap™ CMOS  
Nonvolatile Static RAM  
FEATURES  
DESCRIPTION  
• 25ns, 35ns, 45ns and 55ns Access Times  
The Simtek STK12C68 is a fast static RAM with a  
nonvolatile element incorporated in each static  
memory cell. The SRAM can be read and written an  
unlimited number of times, while independent, non-  
volatile data resides in Nonvolatile Elements. Data  
transfers from the SRAM to the Nonvolatile Elements  
(the STORE operation) can take place automatically  
on power down. A 68µF or larger capacitor tied from  
VCAP to ground guarantees the STORE operation,  
regardless of power-down slew rate or loss of power  
from “hot swapping”. Transfers from the Nonvolatile  
Elements to the SRAM (the RECALL operation) take  
place automatically on restoration of power. Initia-  
tion of STORE and RECALL cycles can also be soft-  
ware controlled by entering specific read  
sequences. A hardware STORE may be initiated with  
the HSB pin.  
• “Hands-off” Automatic STORE with External  
68µF Capacitor on Power Down  
STORE to Nonvolatile Elements Initiated by  
Hardware, Software or AutoStore™ on Power  
Down  
RECALL to SRAM Initiated by Software or  
Power Restore  
• 10mA Typical ICC at 200ns Cycle Time  
• Unlimited READ, WRITE and RECALL Cycles  
• 1,000,000 STORE Cycles to Nonvolatile Ele-  
ments (Commercial/Industrial)  
• 100-Year Data Retention in Nonvolatile Ele-  
ments (Commercial/Industrial)  
• Commercial, Industrial and Military Tempera-  
tures  
• 28-Pin SOIC, DIP and LCC Packages  
BLOCK DIAGRAM  
PIN CONFIGURATIONS  
V
V
CAP  
CCX  
1
2
3
4
5
6
7
8
V
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
V
CAP  
CCX  
A
W
12  
A
HSB  
7
6
POWER  
A
A
8
QUANTUM TRAP  
128 x 512  
A
A
5
9
CONTROL  
A
A
4
3
11  
G
A
A5  
A6  
A7  
A8  
A9  
A
A
E
2
10  
9
A
A
1
0
STORE  
10  
11  
12  
13  
14  
DQ  
7
STORE/  
RECALL  
DQ  
DQ  
6
0
1
2
SS  
HSB  
DQ  
DQ  
5
STATIC RAM  
DQ  
DQ  
4
CONTROL  
RECALL  
V
DQ  
3
ARRAY  
128 x 512  
28 - LCC  
28 - DIP  
A11  
A12  
28 - SOIC  
SOFTWARE  
DETECT  
A
- A  
12  
0
PIN NAMES  
DQ  
DQ  
DQ  
0
1
2
COLUMN I/O  
A
- A  
Address Inputs  
Data In/Out  
Chip Enable  
Write Enable  
Output Enable  
Hardware Store Busy (I/O)  
Power (+ 5V)  
Capacitor  
0
12  
COLUMN DEC  
DQ -DQ  
0
7
DQ  
3
4
E
W
G
DQ  
DQ  
DQ  
DQ  
5
6
7
A
A A  
A A  
1 4  
2 3  
A
10  
0
G
HSB  
E
W
V
V
V
CCX  
CAP  
SS  
Ground  
October 2003  
1
Document Control # ML0008 rev 0.4  

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