Datasheet > STH6N100FI

STH6N100FI

更新时间： 2024-11-08 22:33:11

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		晶体晶体管
页数	文件大小	规格书
10页	204K
描述
N - CHANNEL ENHANCEMENT MODE POWER MOS TRANSISTOR

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中文翻译

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STH6N100FI 数据手册

STH6N100

STH6N100FI

N - CHANNEL ENHANCEMENT MODE

POWER MOS TRANSISTOR

TYPE

V_DSS

R_DS(on)

I_D

STH6N100

STH6N100FI

1000 V

< 2 Ω

6 A

3.7 A

■

TYPICAL R_DS(on)= 1.75 Ω

AVALANCHE RUGGED TECHNOLOGY

100% AVALANCHE TESTED

REPETITIVE AVALANCHE DATA AT 100^oC

LOW INPUT CAPACITANCE

LOW GATE CHARGE

APPLICATION ORIENTED

CHARACTERIZATION

TO-218

ISOWATT218

APPLICATIONS

■

HIGH CURRENT, HIGH SPEED SWITCHING

SWITCH MODE POWER SUPPLIES (SMPS)

CONSUMER AND INDUSTRIAL LIGHTING

DC-AC INVERTERS FOR WELDING

EQUIPMENT AND UNINTERRUPTIBLE

POWER SUPPLY (UPS)

INTERNAL SCHEMATIC DIAGRAM

ABSOLUTE MAXIMUM RATINGS

Symbol

Parameter

Value

Unit

STH6N100

V_DS

V_{DG R}

V_GS

I_D

Drain-source Voltage (V_GS= 0)

Drain- gate Voltage (R_GS= 20 kΩ)

Gate-source Voltage

Drain Current (continuous) at T_c= 25 ^oC

Drain Current (continuous) at T_c= 100 ^oC

Drain Current (pulsed)

1000

± 20

3.7

2.3

I_D

3.7

I_DM(•)

P_tot

Total Dissipation at T_c= 25 ^oC

180

1.44

W/^oC

^oC

Derating Factor

0.56

4000

V_ISO

T_stg

T_j

Insulation Withstand Voltage (DC)

Storage Temperature

-65 to 150

150

Max. Operating Junction Temperature

(•) Pulse width limited by safe operating area

1/10

December 1996

12 3 4 5 6 7...10

中文翻译

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