STE2004
102 X 65 SINGLE CHIP LCD CONTROLLER / DRIVER
■ Low Power Consumption, suitable for battery
1 FEATURES
■ 102 x 65 bits Display Data RAM
■ Programmable MUX rate
■ Programmable Frame Rate
■ X,Y Programmable Carriage Return
operated systems
■ Logic Supply Voltage range from 1.7 to 3.6V
■ High Voltage Generator Supply Voltage range
from 1.75 to 4.5V
■ Display Supply Voltage range from 4.5 to 14.5V
■ Backward Compatibility with STE2001/2
■ Dual Partial Display Mode
■ Row by Row Scrolling
■ N-Line Inversion
2 DESCRIPTION
■ Automatic data RAM Blanking procedure
■ Selectable Input Interface:
The STE2004 is a low power CMOS LCD control-
ler driver. Designed to drive a 65 rows by 102 col-
umns graphic display, it provides all necessary
functions in a single chip, including on-chip LCD
supply and bias voltages generators, resulting in a
minimum of externals components and in a very
low power consumption.
STE2004 features six standard interfaces (3-lines
Serial, 3-lines SPI, 4-lines SPI, 68000 Parallel,
8080 parallel & I2C) for ease of interfacing with the
host micro-controller
• I2C Bus Fast and Hs-mode (read and write)
• 68000 & 8080 Parallel Interfaces (read and write)
• 3-lines and 4-lines SPI Interface (read and write)
• 3-lines 9 bit Serial Interface (read and write)
■ Fully Integrated Oscillator requires no external
components
■ CMOS Compatible Inputs
■ Fully Integrated Configurable LCD bias voltage
generator with:
• Selectable multiplication factor (up to 5
X)
Table 1. Order Codes
• Effective sensing for High Precision Output
• Eight selectable temperature compensation
coefficients
Part Numbers
STE2004DIE1
STE2004DIE2
Type
Bumped Wafers
Bumped Dice on Waffle Pack
■ Designed for chip-on-glass (COG) applications.
Figure 1. Block Diagram
CO to C101
R0 to R64
OSC_IN
OSC_OUT
FR_IN
TIMING
GENERATOR
OSC
COLUMN
DRIVERS
ROW
DRIVERS
MASTER
SLAVE SYNC
CLOCK
FR_OUT
BIAS VOLTAGE
GENERATOR
DATA
LATCHES
SHIFT
REGISTER
VSENSE SLAVE
VLCD
HIGH VOLTAGE
GENERATOR
VLCDSENSE
65 x 102
RAM
SCROLL
LOGIC
RES
RESET
TEST_MODE
TEST_VREF
TEST
VSSAUX
VDD1,2
DISPLAY
CONTROL
LOGIC
DATA
REGISTER
INSTRUCTION
REGISTER
ICON_MODE
EXT
VSS
SEL1,2
SEL 0
SEL 1
SEL 2
3 & 4 Line SPI
Parallel 68K
I2C BUS
Parallel 8080
9 Bit SERIAL
SA1 SAO SDOUT SCLK/SCL SDIN/SDA_IN SDA_OUT
E/WR R/W- RD D/C
CS
DB0
to
LR0047
DB7
Rev. 4
1/66
July 2004