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ST6G3240TBR PDF预览

ST6G3240TBR

更新时间: 2024-11-22 03:05:59
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 转换器电平转换器存储
页数 文件大小 规格书
29页 560K
描述
Dual supply level translator for dual memory cards (mini SD/micro SD + managed NAND)

ST6G3240TBR 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:BGA
包装说明:TFBGA,针数:36
Reach Compliance Code:compliant风险等级:5.67
接口集成电路类型:INTERFACE CIRCUITJESD-30 代码:S-PBGA-B36
长度:3.6 mm功能数量:1
端子数量:36最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TFBGA封装形状:SQUARE
封装形式:GRID ARRAY, THIN PROFILE, FINE PITCH峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:Not Qualified座面最大高度:1.16 mm
最大供电电压:3.6 V最小供电电压:1.4 V
标称供电电压:1.8 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:BALL端子节距:0.5 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3.6 mmBase Number Matches:1

ST6G3240TBR 数据手册

 浏览型号ST6G3240TBR的Datasheet PDF文件第2页浏览型号ST6G3240TBR的Datasheet PDF文件第3页浏览型号ST6G3240TBR的Datasheet PDF文件第4页浏览型号ST6G3240TBR的Datasheet PDF文件第5页浏览型号ST6G3240TBR的Datasheet PDF文件第6页浏览型号ST6G3240TBR的Datasheet PDF文件第7页 
ST6G3240  
Dual supply level translator for dual memory cards  
(mini SD/micro SD + managed NAND)  
Features  
High speed: t (A to B) = 5 ns at T = 85 °C  
PD  
A
with V  
= 1.8 V, V  
= 3.0 V  
CCA  
CCBn  
Low power dissipation: I  
= I  
= 5 µA  
CCA  
CCBn  
(max.) at T = 85 °C  
A
Balanced propagation delays: tPLH t  
Operating voltage range:  
PHL  
– V  
– V  
(opr) = 1.4 to 3.6 V  
CCA  
(opr) = 1.4 to 3.6 V  
CCBn  
B-side power supplies (V  
and V  
) can  
CCB2  
CCB1  
be different and separately controlled  
Interchangeable voltage levels:  
μTFBGA 36  
V
V
can either be greater than or less than  
CCA  
CCBn  
Low power mode:  
when V is grounded or floating, there is  
CCBn  
very low quiescent current on V  
Description  
CCA  
Power down detection:  
The ST6G3240 is a dual supply low voltage  
CMOS level translator supporting the dual  
function of mini SD/micro SD card and managed  
NAND memories. It is designed for use as an  
interface between three systems using 3.3, 2.5  
and 1.8 V respectively.  
when either one of the B-side power supplies  
(V and V ) is grounded or floating, the  
CCB1  
CCB2  
corresponding port-n goes into high-Z state  
automatically  
Latch-up performance exceeds 500 mA  
(JESD17)  
The ST6G3240 is capable of achieving high  
speed operation and at the same time maintaining  
low power dissipation.  
ESD protection: 2 kV HBM  
Integrated pull-up resistor and level translator  
on the MS_Insert pin  
While the A port is designed to track V  
, the Bn  
CCA  
port (nCMD, nDAT, nCLK) is designed to track  
Integrated pull-up resistor for card-detect pin  
V
.
CCBn  
The device is intended for a two-way  
asynchronous communication between data  
buses.  
Table 1.  
Device summary  
Order code  
Package  
Packing  
ST6G3240TBR  
μTFBGA36 (3.6 x 3.6 mm)  
Tape and reel  
April 2008  
Rev 2  
1/29  
www.st.com  
29  

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