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SST39SF512-70-4I-WHE PDF预览

SST39SF512-70-4I-WHE

更新时间: 2024-11-23 04:50:35
品牌 Logo 应用领域
SST 闪存内存集成电路光电二极管
页数 文件大小 规格书
22页 341K
描述
512 Kbit / 1 Mbit (x8) Multi-Purpose Flash

SST39SF512-70-4I-WHE 数据手册

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512 Kbit (x8) Multi-Purpose Flash  
SST39SF512  
SST39SF5125.0V 512Kb (x8) MPF memory  
Data Sheet  
FEATURES:  
Organized as 64K x8  
Fast Erase and Byte-Program  
Single 4.5-5.5V Read and Write Operations  
Superior Reliability  
– Sector-Erase Time: 7 ms (typical)  
– Chip-Erase Time: 15 ms (typical)  
– Byte-Program Time: 20 µs (typical)  
– Endurance: 100,000 Cycles (typical)  
– Greater than 100 years Data Retention  
– Chip Rewrite Time: 2 seconds (typical)  
Automatic Write Timing  
Low Power Consumption  
(typical values at 14 MHz)  
– Internal VPP Generation  
End-of-Write Detection  
– Active Current: 10 mA (typical)  
– Standby Current: 10 µA (typical)  
Toggle Bit  
– Data# Polling  
Sector-Erase Capability  
– Uniform 4 KByte sectors  
Fast Read Access Time:  
– 70 ns  
TTL I/O Compatibility  
JEDEC Standard  
– Flash EEPROM Pinouts and command sets  
Packages Available  
Latched Address and Data  
– 32-lead PLCC  
– 32-lead TSOP (8mm x 14mm)  
– 32-pin PDIP  
PRODUCT DESCRIPTION  
The SST39SF512 are CMOS Multi-Purpose Flash (MPF)  
manufactured with SST’s proprietary, high performance  
CMOS SuperFlash technology. The split-gate cell design  
and thick-oxide tunneling injector attain better reliability and  
manufacturability compared with alternate approaches.  
The SST39SF512 devices write (Program or Erase) with a  
4.5-5.5V power supply. The SST39SF512 device conforms  
to JEDEC standard pinouts for x8 memories.  
the applied voltage, current, and time of application. Since  
for any given voltage range, the SuperFlash technology  
uses less current to program and has a shorter erase time,  
the total energy consumed during any Erase or Program  
operation is less than alternative flash technologies. These  
devices also improve flexibility while lowering the cost for  
program, data, and configuration storage applications.  
The SuperFlash technology provides fixed Erase and Pro-  
gram times, independent of the number of Erase/Program  
cycles that have occurred. Therefore the system software  
or hardware does not have to be modified or de-rated as is  
necessary with alternative flash technologies, whose Erase  
and Program times increase with accumulated Erase/Pro-  
gram cycles.  
Featuring high performance Byte-Program, the  
SST39SF512 devices provide a maximum Byte-Program  
time of 30 µsec. These devices use Toggle Bit or Data#  
Polling to indicate the completion of Program operation. To  
protect against inadvertent write, they have on-chip hard-  
ware and Software Data Protection schemes. Designed,  
manufactured, and tested for a wide spectrum of applica-  
tions, these devices are offered with a guaranteed typical  
endurance of 100,000 cycles. Data retention is rated at  
greater than 100 years.  
To meet high density, surface mount requirements, the  
SST39SF512 are offered in 32-lead PLCC, 32-lead TSOP,  
and a 600 mil, 32-pin PDIP packages. See Figures 1, 2,  
and 3 for pin assignments.  
The SST39SF512 devices are suited for applications that  
require convenient and economical updating of program,  
configuration, or data memory. For all system applications,  
they significantly improve performance and reliability, while  
lowering power consumption. They inherently use less  
energy during erase and program than alternative flash  
technologies. The total energy consumed is a function of  
©2003 Silicon Storage Technology, Inc.  
The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc.  
MPF is a trademark of Silicon Storage Technology, Inc.  
S71149-05-000  
1
11/03  
These specifications are subject to change without notice.  

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