512 Kbit / 1 Mbit / 2 Mbit (x8) Multi-Purpose Flash
SST39SF512A / SST39SF010A / SST39SF020A
DataSheet
FEATURES:
•
FastEraseandByte-Program:
1
– Sector-Erase Time: 18 ms (typical)
– Chip-Erase Time: 70 ms (typical)
– Byte-Program Time: 14 µs (typical)
– ChipRewriteTime:
•
•
•
Organized as 64K x8 / 128K x8 / 256K x8
Single 5.0V Read and Write Operations
SuperiorReliability
2
1 seconds (typical) for SST39SF512A
2 seconds (typical) for SST39SF010A
4 seconds (typical) for SST39SF020A
– Endurance: 100,000 Cycles (typical)
– Greater than 100 years Data Retention
3
•
Low Power Consumption:
•
•
Automatic Write Timing
- InternalVPPGeneration
End-of-WriteDetection
– Active Current: 10 mA (typical)
– Standby Current: 30 µA (typical)
4
•
•
•
Sector-EraseCapability
– Uniform 4 KByte sectors
FastReadAccessTime:
– 45 and 70 ns
– Toggle Bit
– Data# Polling
•
•
TTL I/O Compatibility
5
JEDEC Standard
LatchedAddressandData
– Flash EEPROM Pinouts and command sets
Packages Available
6
•
– 32-Pin PDIP
– 32-Pin PLCC
– 32-Pin TSOP (8mm x 14mm)
7
PRODUCTDESCRIPTION
8
of application. Since for any given voltage range, the
SuperFlash technology uses less current to program and
hasashortererasetime,thetotalenergyconsumedduring
any Erase or Program operation is less than alternative
flash technologies. These devices also improve flexibility
whileloweringthecostforprogram,data,andconfiguration
storageapplications.
The SST39SF512A/010A/020A are CMOS Multi-Pur-
poseFlash(MPF)manufacturedwithSST’sproprietary,
high performance CMOS SuperFlash technology. The
split-gate cell design and thick oxide tunneling injector
attain better reliability and manufacturability compared
with alternate approaches. The SST39SF512A/010A/
020Adeviceswrite(ProgramorErase)witha5.0Vpower
supply.TheSST39SF512A/010A/020Adeviceconforms
to JEDEC standard pinouts for x8 memories.
9
10
11
12
13
14
15
16
The SuperFlash technology provides fixed Erase and
Program times, independent of the number of Erase/
Program cycles that have occurred. Therefore the sys-
tem software or hardware does not have to be modified
or de-rated as is necessary with alternative flash tech-
nologies,whoseEraseandProgramtimesincreasewith
accumulated Erase/Program cycles.
Featuring high performance Byte-Program, the
SST39SF512A/010A/020Adevicesprovideamaximum
Byte-Programtimeof20µsec.ThesedevicesuseToggle
BitorData#PollingtoindicatethecompletionofProgram
operation.Toprotectagainstinadvertentwrite,theyhave
on-chip hardware and Software Data Protection
schemes.Designed,manufactured,andtestedforawide
spectrum of applications, these devices are offered with
aguaranteedenduranceof10,000cycles.Dataretention
is rated at greater than 100 years.
To meet high density, surface mount requirements, the
SST39SF512A/010A/020A are offered in 32-pin TSOP
and 32-pin PLCC packages. A 600 mil, 32-pin PDIP is
also available. See Figures 1, 2 and 3 for pinouts.
DeviceOperation
The SST39SF512A/010A/020A devices are suited for
applicationsthatrequireconvenientandeconomicalupdat-
ing of program, configuration, or data memory. For all
system applications, they significantly improve perfor-
mance and reliability, while lowering power consumption.
Theyinherentlyuselessenergyduringeraseandprogram
than alternative flash technologies. The total energy con-
sumedisafunctionoftheappliedvoltage,current,andtime
Commands are used to initiate the memory operation
functionsofthedevice.Commandsarewrittentothedevice
using standard microprocessor write sequences. A com-
mand is written by asserting WE# low while keeping CE#
low. TheaddressbusislatchedonthefallingedgeofWE#
or CE#, whichever occurs last. The data bus is latched on
the rising edge of WE# or CE#, whichever occurs first.
©2000SiliconStorageTechnology,Inc.
509-3 10/00 S71164
TheSSTlogoandSuperFlashareregisteredtrademarksofSiliconStorageTechnology,Inc.MPFisatrademarkofSiliconstorageTechnology,Inc.
Thesespecificationsaresubjecttochangewithoutnotice.
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