2 Megabit (256K x 8) Multi-Purpose Flash
SST39SF020
Preliminary Specifications
FEATURES:
•
•
•
Organized as 256 K X 8
•
Fast Sector Erase and Byte Program:
1
– Sector Erase Time: 7 ms (typical)
– Chip Erase Time: 15 ms (typical)
– Byte Program time: 20 µs (typical)
– Chip Rewrite Time: 5 seconds (typical)
Single 5.0V Read and Write Operations
Superior Reliability
– Endurance: 100,000 Cycles (typical)
– Greater than 100 years Data Retention
2
•
•
Automatic Write Timing
- Internal Vpp Generation
End of Write Detection
•
Low Power Consumption:
– Active Current: 20 mA (typical)
– Standby Current: 10 µA (typical)
3
– Toggle Bit
– Data# Polling
•
•
•
Sector Erase Capability
– Uniform 4 KByte sectors
Fast Read Access Time:
– 70 and 90 ns
4
•
•
TTL I/O Compatibility
JEDEC Standard
– EEPROM Pinouts and command set
Packages Available
5
Latched Address and Data
•
– 32-Pin PDIP
– 32-Pin PLCC
– 32-Pin TSOP (8mm x 14mm)
6
7
PRODUCT DESCRIPTION
consumption. The SST39SF020 inherently uses less
energy during erase and program than alternative flash
technologies.Thetotalenergyconsumedisafunctionof
the applied voltage, current, and time of application.
Since for any given voltage range, the SuperFlash tech-
nology uses less current to program and has a shorter
erase time, the total energy consumed during any Erase
or Program operation is less than alternative flash tech-
nologies. The SST39SF020 device also improves flex-
ibility while lowering the cost for program, data, and
configuration storage applications.
The SST39SF020 is a 256K x 8 CMOS Multi-Purpose
Flash (MPF) manufactured with SST’s proprietary, high
performance CMOS SuperFlash technology. The split
gate cell design and thick oxide tunneling injector attain
better reliability and manufacturability compared with
alternate approaches. The SST39SF020 device writes
(Program or Erase) with a 5.0V-only power supply. The
SST39SF020 device conforms to JEDEC standard
pinouts for x8 memories.
8
9
10
11
12
13
14
15
16
Featuring high performance byte program, the
SST39SF020 device provides a maximum byte-pro-
gram time of 30 µsec. The entire memory can be erased
and programmed byte by byte typically in 5 seconds,
when using interface features such as Toggle Bit or
Data# Polling to indicate the completion of Program
operation. To protect against inadvertent write, the
SST39SF020 device has on-chip hardware and soft-
ware data protection schemes. Designed, manufac-
tured,andtestedforawidespectrumofapplications,the
SST39SF020deviceisofferedwithaguaranteedendur-
ance of 10,000 cycles. Data retention is rated at greater
than 100 years.
The SuperFlash technology provides fixed Erase and
Programtimes,independentofthenumberofendurance
cycles that have occurred. Therefore the system soft-
ware or hardware does not have to be modified or de-
ratedasisnecessarywithalternativeflashtechnologies,
whose erase and program times increase with accumu-
lated endurance cycles.
To meet high density, surface mount requirements, the
SST39SF020 device is offered in 32-pin TSOP and 32-
pin PLCC packages. A 600 mil, 32-pin PDIP is also
available. See Figures 1 and 2 for pinouts.
The SST39SF020 device is suited for applications that
requireconvenientandeconomicalupdatingofprogram,
configuration, or data memory. For all system applica-
tions, the SST39SF020 device significantly improves
performance and reliability, while lowering power
Device Operation
Commands are used to initiate the memory operation
functions of the device. Commands are written to the
deviceusingstandardmicroprocessorwritesequences.
A command is written by asserting WE# low while
© 1998 Silicon Storage Technology, Inc. The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc. MPF is a trademark of Silicon storage Technology, Inc.
326-10 12/98 These specifications are subject to change without notice.
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