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SST32HF1622C-90-4E-LS PDF预览

SST32HF1622C-90-4E-LS

更新时间: 2024-11-15 15:52:55
品牌 Logo 应用领域
芯科 - SILICON 静态存储器内存集成电路
页数 文件大小 规格书
37页 427K
描述
Memory Circuit, 1MX16, CMOS, PBGA62, 8 X 10 MM, 1.40 MM HEIGHT, MO-210, LFBGA-62

SST32HF1622C-90-4E-LS 技术参数

生命周期:Obsolete零件包装代码:BGA
包装说明:LFBGA,针数:62
Reach Compliance Code:unknownHTS代码:8542.32.00.71
风险等级:5.84其他特性:SRAM IS ORGANIZED AS 128K X 16
JESD-30 代码:R-PBGA-B62长度:10 mm
内存密度:16777216 bit内存集成电路类型:MEMORY CIRCUIT
内存宽度:16功能数量:1
端子数量:62字数:1048576 words
字数代码:1000000工作模式:ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-20 °C
组织:1MX16封装主体材料:PLASTIC/EPOXY
封装代码:LFBGA封装形状:RECTANGULAR
封装形式:GRID ARRAY, LOW PROFILE, FINE PITCH认证状态:Not Qualified
座面最大高度:1.4 mm最大供电电压 (Vsup):3.3 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3 V
表面贴装:YES技术:CMOS
温度等级:OTHER端子形式:BALL
端子节距:0.8 mm端子位置:BOTTOM
宽度:8 mmBase Number Matches:1

SST32HF1622C-90-4E-LS 数据手册

 浏览型号SST32HF1622C-90-4E-LS的Datasheet PDF文件第2页浏览型号SST32HF1622C-90-4E-LS的Datasheet PDF文件第3页浏览型号SST32HF1622C-90-4E-LS的Datasheet PDF文件第4页浏览型号SST32HF1622C-90-4E-LS的Datasheet PDF文件第5页浏览型号SST32HF1622C-90-4E-LS的Datasheet PDF文件第6页浏览型号SST32HF1622C-90-4E-LS的Datasheet PDF文件第7页 
Multi-Purpose Flash Plus + SRAM ComboMemory  
SST32HF1642 / SST32HF1682 / SST32HF3242 / SST32HF3282 / SST32HF6482  
SST32HF1622C / SST32HF1642C / SST32HF3242C  
SST32HF16x2x / 32x2x / 6482x16/32/64Mb Flash + 4/8Mb SRAM, 32Mb Flash + 8Mb SRAM  
Preliminary Specifications  
(x16) MCP ComboMemories  
FEATURES:  
ComboMemories organized as:  
Security-ID Feature  
– SST32HF1622C: 1M x16 Flash + 128K x16 SRAM  
– SST32HF1642x: 1M x16 Flash + 256K x16 SRAM  
– SST32HF1682: 1M x16 Flash + 512K x16 SRAM  
– SST32HF3242x: 2M x16 Flash + 256K x16 SRAM  
– SST32HF3282: 2M x16 Flash + 512K x16 SRAM  
– SST32HF6482: 4M x16 Flash + 512K x16 SRAM  
Single 2.7-3.3V Read and Write Operations  
Concurrent Operation  
– Read from or Write to SRAM while  
Erase/Program Flash  
Superior Reliability  
– Endurance: 100,000 Cycles (typical)  
– Greater than 100 years Data Retention  
Low Power Consumption:  
– Active Current: 15 mA (typical) for  
Flash or SRAM Read  
– SST: 128 bits; User: 128 bits  
Hardware Block-Protection/WP# Input Pin  
Top Block-Protection (top 32 KWord)  
Fast Read Access Times:  
– Flash: 70 ns and 90 ns  
– SRAM: 70 ns and 90 ns  
Latched Address and Data for Flash  
Flash Fast Erase and Word-Program:  
– Sector-Erase Time: 18 ms (typical)  
– Block-Erase Time: 18 ms (typical)  
– Chip-Erase Time: 40 ms (typical)  
– Word-Program Time: 7 µs (typical)  
Flash Automatic Erase and Program Timing  
– Internal VPP Generation  
Flash End-of-Write Detection  
– Standby Current:  
Toggle Bit  
– Data# Polling  
- SST32HFx2: 60 µA (typical)  
- SST32HFx2C: 12 µA (typical)  
Flexible Erase Capability  
– Uniform 2 KWord sectors  
– Uniform 32 KWord size blocks  
CMOS I/O Compatibility  
JEDEC Standard Command Set  
Package Available  
– 63-ball LFBGA (8mm x 10mm x 1.4mm)  
– 62-ball LFBGA (8mm x 10mm x 1.4mm)  
– 64-ball LFBGA (8mm x 10mm x 1.4mm)  
Erase-Suspend/Erase-Resume Capabilities  
PRODUCT DESCRIPTION  
The SST32HFx2/x2C ComboMemory devices integrate  
a CMOS flash memory bank with a CMOS SRAM mem-  
ory bank in a Multi-Chip Package (MCP), manufactured  
with SST’s proprietary, high performance SuperFlash  
technology. The SST32HF16x2/32x2/6482 devices use a  
PseudoSRAM. The SST32HF16x2C/3242C devices use  
standard SRAM.  
signals. The SRAM bank enable signal, BES# selects the  
SRAM bank. The flash memory bank enable signal, BEF#  
selects the flash memory bank. The WE# signal has to be  
used with Software Data Protection (SDP) command  
sequence when controlling the Erase and Program opera-  
tions in the flash memory bank. The SDP command  
sequence protects the data stored in the flash memory  
bank from accidental alteration.  
Featuring high performance Word-Program, the flash  
memory bank provides a maximum Word-Program time of  
7 µsec. To protect against inadvertent flash write, the  
SST32HFx2/x2C devices contain on-chip hardware and  
software data protection schemes. The SST32HFx2/x2C  
devices offer a guaranteed endurance of 10,000 cycles.  
Data retention is rated at greater than 100 years.  
The SST32HFx2/x2C provide the added functionality of  
being able to simultaneously read from or write to the  
SRAM bank while erasing or programming in the flash  
memory bank. The SRAM memory bank can be read or  
written while the flash memory bank performs Sector-  
Erase, Bank-Erase, or Word-Program concurrently. All  
flash memory Erase and Program operations will automati-  
cally latch the input address and data signals and complete  
the operation in background without further input stimulus  
requirement. Once the internally controlled Erase or Pro-  
gram cycle in the flash bank has commenced, the SRAM  
bank can be accessed for Read or Write.  
The SST32HFx2/x2C devices consist of two independent  
memory banks with respective bank enable signals. The  
Flash and SRAM memory banks are superimposed in the  
same memory address space. Both memory banks share  
common address lines, data lines, WE# and OE#. The  
memory bank selection is done by memory bank enable  
©2004 Silicon Storage Technology, Inc.  
The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc.  
MPF+ and ComboMemory are trademarks of Silicon Storage Technology, Inc.  
These specifications are subject to change without notice.  
S71253-01-000  
1
6/04  

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