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SST25VF010A-20-4C-SAE PDF预览

SST25VF010A-20-4C-SAE

更新时间： 2024-11-19 00:04:23
品牌 Logo 应用领域
SST /
页数 文件大小 规格书
22页 348K
描述
IC SPI FLASH

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SST25VF010A-20-4C-SAE 数据手册

 浏览型号SST25VF010A-20-4C-SAE的Datasheet PDF文件第2页浏览型号SST25VF010A-20-4C-SAE的Datasheet PDF文件第3页浏览型号SST25VF010A-20-4C-SAE的Datasheet PDF文件第4页浏览型号SST25VF010A-20-4C-SAE的Datasheet PDF文件第5页浏览型号SST25VF010A-20-4C-SAE的Datasheet PDF文件第6页浏览型号SST25VF010A-20-4C-SAE的Datasheet PDF文件第7页 
1 Mbit SPI Serial Flash  
SST25VF010  
SST25VF0101Mb Serial Peripheral Interface (SPI) flash memory  
Data Sheet  
FEATURES:  
•
•
Single 2.7-3.6V Read and Write Operations  
•
Auto Address Increment (AAI) Programming  
– Decrease total chip programming time over  
Byte-Program operations  
End-of-Write Detection  
– Software Status  
Serial Interface Architecture  
– SPI Compatible: Mode 0 and Mode 3  
20 MHz Max Clock Frequency  
Superior Reliability  
•
•
•
•
Hold Pin (HOLD#)  
– Endurance: 100,000 Cycles (typical)  
– Greater than 100 years Data Retention  
– Suspends a serial sequence to the memory  
without deselecting the device  
•
•
•
Low Power Consumption:  
•
•
•
•
Write Protection (WP#)  
– Active Read Current: 7 mA (typical)  
– Standby Current: 8 µA (typical)  
– Enables/Disables the Lock-Down function of the  
status register  
Flexible Erase Capability  
Software Write Protection  
– Uniform 4 KByte sectors  
– Uniform 32 KByte overlay blocks  
– Write protection through Block-Protection bits in  
status register  
Fast Erase and Byte-Program:  
Packages Available  
– Chip-Erase Time: 70 ms (typical)  
– Sector- or Block-Erase Time: 18 ms (typical)  
– Byte-Program Time: 14 µs (typical)  
– 8-lead SOIC (4.9mm x 6mm)  
– 8-contact WSON  
All non-Pb (lead-free) devices are RoHS compliant  
PRODUCT DESCRIPTION  
SST’s serial flash family features a four-wire, SPI-com-  
patible interface that allows for a low pin-count package  
occupying less board space and ultimately lowering total  
system costs. SST25VF010 SPI serial flash memory is  
manufactured with SST’s proprietary, high performance  
CMOS SuperFlash Technology. The split-gate cell design  
and thick-oxide tunneling injector attain better reliability  
and manufacturability compared with alternate  
approaches.  
current, and time of application. Since for any given volt-  
age range, the SuperFlash technology uses less current  
to program and has a shorter erase time, the total energy  
consumed during any Erase or Program operation is less  
than alternative flash memory technologies. The  
SST25VF010 device operates with a single 2.7-3.6V  
power supply.  
The SST25VF010 device is offered in both 8-lead SOIC  
and 8-contact WSON packages. See Figure 1 for the pin  
assignments.  
The SST25VF010 device significantly improves perfor-  
mance, while lowering power consumption. The total  
energy consumed is a function of the applied voltage,  
©2005 Silicon Storage Technology, Inc.  
The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc.  
These specifications are subject to change without notice.  
S71233-04-000  
1
1/05  
1234567...22

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