Datasheet > SRM20W117LLRX2

SRM20W117LLRX2

更新时间： 2024-11-11 20:43:55

品牌	Logo	应用领域
精工 - SEIKO		静态存储器光电二极管内存集成电路
页数	文件大小	规格书
8页	79K
描述
64KX16 STANDARD SRAM, 120ns, PDSO44, PLASTIC, REVERSE, TSOP2-44

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SRM20W117LLRX2 数据手册

PF873-03

SRM20W117LLTX/SLTX2/7

1M-Bit Static RAM

● Super Low Voltage Operation and Low Current Consumption

● Access Time 120ns (1.8V) / 70ns (2.7V)

● 65,536 WordsX16-Bit Asynchtonous

● Wide Temperature Range

■ DESCRIPTION

The SRM20W117LLTX/SLTX2/7 is a 65,536 words x 16-bit asynchronous, random access memory on a monolithic

CMOS chip. Its very low standby power requirement makes it ideat for applications requiring non-volatile syorage

with back-up batteries. The asynchronous and static nature of the memory requires no external clock or refreshing

circuit. It is possible to contorol the date width by the data byte control. Both the Input and output ports are TTL

compatible and 3-state output allows easy expansion of memory capacity. The temperature range of the

SRM20W117LLTX/SLTX2/7 is from –25 to 85°C, and it is suitable for the industrial products.

■ PIN CONFIGURATION

■ FEATURES

● Fast Access time ........................ 120ns (at 1.8V) / 70ns (at 2.7V)

● Low supply current ..................... LL Version, SL Version

● Completely static ........................ No clock required

● Supply voltage............................ 1.8V to 3.6V

● TTL compatible inputs and outputs

● 3-state output with wired-OR capability

● Non-volatile storage with back-up batteries

● Package ..................................... SRM20W117LLTX/SLTX

TSOP (II)-44pin (Plastic)

(TSOP (II) )

I/O16

I/O15

I/O14

I/O13

I/O1

I/O2

I/O3

I/O4

VDD

VSS

VDD

I/O5

I/O6

I/O7

I/O8

A15

A14

A13

A12

N.C.

I/O12

I/O11

I/O10

I/O9

N.C.

SRM20W117LLRX/SLRX

A10

A11

N.C.

TSOP (II)-44pin-R1 (Plastic)

■ BLOCK DIAGRAM

(TSOP (II)-R1)

I/O16

I/O15

I/O14

I/O13

I/O1

I/O2

I/O3

I/O4

A10

A11

A12

A13

A14

A15

512

Memory Cell Array

512 x 128 x 16

VSS

VDD

VSS

I/O12

I/O11

IO10

I/O9

N.C.

I/O5

I/O6

I/O7

I/O8

A15

A14

A13

A12

N.C.

128x16

128

A10

A11

N.C.

Column Gate

■ PIN DESCRIPTION

A0 to A15 Address Input

Write Enable

Output Enable

Chip Select

LOWER Byte Enable

UPPER Byte Enable

I/O Buffer

I/O1 to 16 Data I/O

VDD

VSS

Power Supply (1.8V to 3.6V)

Power Supply (0V)

No connection

I/O1

I/O16

12 3 4 5 6 7 8

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与SRM20W117LLRX2相关器件

型号	品牌	获取价格	描述	数据表
SRM20W117LLRX7	SEIKO	获取价格	64KX16 STANDARD SRAM, 70ns, PDSO44, PLASTIC, REVERSE, TSOP2-44
SRM20W117LLTT7	SEIKO	获取价格	64KX16 STANDARD SRAM, 70ns, PDSO44, PLASTIC, TSOP2-44
SRM20W117SLRX2	SEIKO	获取价格	64KX16 STANDARD SRAM, 120ns, PDSO44, PLASTIC, REVERSE, TSOP2-44
SRM20W117SLTT2	SEIKO	获取价格	64KX16 STANDARD SRAM, 120ns, PDSO44, PLASTIC, TSOP2-44
SRM20W117SLTT7	SEIKO	获取价格	64KX16 STANDARD SRAM, 70ns, PDSO44, PLASTIC, TSOP2-44
SRM20W117SLTX2	SEIKO	获取价格	64KX16 STANDARD SRAM, 120ns, PDSO44, PLASTIC, TSOP2-44
SRM21016LLRT12	SEIKO	获取价格	Standard SRAM, 128KX8, 120ns, CMOS, PDSO44
SRM21016LLRX2	SEIKO	获取价格	64KX16 STANDARD SRAM, 120ns, PDSO44, PLASTIC, REVERSE, TSOP2-44
SRM21016LLTX15	SEIKO	获取价格	Standard SRAM, 128KX8, 150ns, CMOS, PDSO44
SRM2114C25	ETC	获取价格	x4 SRAM

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