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SNJ54LV174AW PDF预览

SNJ54LV174AW

更新时间： 2024-11-01 05:16:55
品牌 Logo 应用领域
德州仪器 - TI 触发器
页数 文件大小 规格书
18页 428K
描述
HEX D-TYPE FLIP-FLOPS WITH CLEAR

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SNJ54LV174AW 数据手册

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SCLS401G − APRIL 1998 − REVISED APRIL 2005  
SN54LV174A . . . J OR W PACKAGE  
SN74LV174A . . . D, DB, DGV, NS, OR PW PACKAGE  
(TOP VIEW)  
D
D
D
D
D
D
D
2-V to 5.5-V V  
Operation  
CC  
Max t of 8.5 ns at 5 V  
pd  
Typical V  
<0.8 V at V  
(Output Ground Bounce)  
OLP  
CC  
= 3.3 V, T = 25°C  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
CLR  
1Q  
1D  
2D  
2Q  
3D  
3Q  
GND  
V
CC  
A
6Q  
6D  
5D  
5Q  
4D  
4Q  
CLK  
Typical V  
>2.3 V at V  
(Output V  
Undershoot)  
OHV  
CC  
OH  
= 3.3 V, T = 25°C  
A
Support Mixed-Mode Voltage Operation on  
All Ports  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
SN54LV174A . . . FK PACKAGE  
(TOP VIEW)  
− 1000-V Charged-Device Model (C101)  
description/ordering information  
3
2
1 20 19  
18 6D  
The ’LV174A devices are hex D-type flip-flops  
1D  
2D  
NC  
2Q  
3D  
4
5
6
7
8
designed for 2-V to 5.5-V V  
operation.  
CC  
17  
5D  
NC  
5Q  
4D  
These devices are positive-edge-triggered  
flip-flops with a direct clear (CLR) input.  
Information at the data (D) inputs meeting the  
setup time requirements is transferred to the  
outputs on the positive-going edge of the clock  
pulse. Clock triggering occurs at a particular  
voltage level and is not directly related to the  
transition time of the positive-going edge of the  
clock pulse. When the clock (CLK) input is at  
either the high or low level, the D-input signal has  
no effect at the output.  
16  
15  
14  
9 10 11 12 13  
NC − No internal connection  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
†
PACKAGE  
T
A
Tube of 40  
SN74LV174AD  
SOIC − D  
LV174A  
Reel of 2500  
Reel of 2000  
Reel of 2000  
Tube of 90  
SN74LV174ADR  
SN74LV174ANSR  
SN74LV174ADBR  
SN74LV174APW  
SN74LV174APWR  
SN74LV174APWT  
SN74LV174ADGVR  
SNJ54LV174AJ  
SOP − NS  
74LV174A  
LV174A  
SSOP − DB  
−40°C to 85°C  
Reel of 2000  
Reel of 250  
Reel of 2000  
Tube of 25  
TSSOP − PW  
LV174A  
TVSOP − DGV  
CDIP − J  
LV174A  
SNJ54LV174AJ  
SNJ54LV174AW  
SNJ54LV174AFK  
−55°C to 125°C  
CFP − W  
Tube of 150  
Tube of 55  
SNJ54LV174AW  
SNJ54LV174AFK  
LCCC − FK  
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design  
guidelines are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2005, Texas Instruments Incorporated  
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...18

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