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ꢖ ꢔꢑꢗ ꢘ ꢄꢏ ꢈꢍ
SCLS400G − APRIL 1998 − REVISED APRIL 2005
SN54LV175A . . . J OR W PACKAGE
SN74LV175A . . . D, DB, DGV, NS, OR PW PACKAGE
(TOP VIEW)
D
D
D
D
D
D
D
2-V to 5.5-V V
Operation
CC
Max t of 7.5 ns at 5 V
pd
Typical V
<0.8 V at V
(Output Ground Bounce)
OLP
CC
= 3.3 V, T = 25°C
CLR
1Q
1Q
1D
2D
2Q
2Q
GND
V
CC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
A
4Q
4Q
4D
3D
3Q
3Q
CLK
Typical V
>2.3 V at V
(Output V
Undershoot)
OHV
CC
OH
= 3.3 V, T = 25°C
A
Support Mixed-Mode Voltage Operation on
All Ports
Contain Four Flip-Flops With Double-Rail
Outputs
Applications Include:
− Buffer/Storage Registers
− Shift Registers
SN54LV175A . . . FK PACKAGE
(TOP VIEW)
− Pattern Generators
D
D
Latch-Up Performance Exceeds 250 mA Per
JESD 17
3
2 1 20 19
18 4Q
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
1Q
1D
NC
2D
2Q
4
5
6
7
8
17
4D
NC
3D
3Q
16
15
14
− 1000-V Charged-Device Model (C101)
description/ordering information
9 10 11 12 13
The ’LV175A devices are quadruple D-type
flip-flops designed for 2-V to 5.5-V V
operation.
CC
NC − No internal connection
These devices have a direct clear (CLR) input and
feature complementary outputs from each
flip-flop.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
Tube of 40
SN74LV175AD
SOIC − D
LV175A
Reel of 2500
Reel of 2000
Reel of 2000
Tube of 90
SN74LV175ADR
SN74LV175ANSR
SN74LV175ADBR
SN74LV175APW
SN74LV175APWR
SN74LV175APWT
SN74LV175ADGVR
SNJ54LV175AJ
SOP − NS
74LV175A
LV175A
SSOP − DB
−40°C to 85°C
Reel of 2000
Reel of 250
Reel of 2000
Tube of 25
TSSOP − PW
LV175A
TVSOP − DGV
CDIP − J
LV175A
SNJ54LV175AJ
SNJ54LV175AW
SNJ54LV175AFK
−55°C to 125°C
CFP − W
Tube of 150
Tube of 55
SNJ54LV175AW
SNJ54LV175AFK
LCCC − FK
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2005, Texas Instruments Incorporated
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1
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