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SNJ54HC251FK PDF预览

SNJ54HC251FK

更新时间: 2024-11-01 22:59:15
品牌 Logo 应用领域
德州仪器 - TI 复用器输出元件
页数 文件大小 规格书
17页 489K
描述
DATA SELECTORS/MULTIPLEXERS WITH 3-STATE OUTPUTS

SNJ54HC251FK 技术参数

生命周期:Active零件包装代码:QLCC
包装说明:QCCN, LCC20,.35SQ针数:20
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
风险等级:5.27系列:HC/UH
JESD-30 代码:S-CQCC-N20长度:8.89 mm
负载电容(CL):150 pF逻辑集成电路类型:MULTIPLEXER
最大I(ol):0.0078 A位数:8
功能数量:1输入次数:8
输出次数:1端子数量:20
最高工作温度:125 °C最低工作温度:-55 °C
输出特性:3-STATE输出极性:COMPLEMENTARY
封装主体材料:CERAMIC, METAL-SEALED COFIRED封装代码:QCCN
封装等效代码:LCC20,.35SQ封装形状:SQUARE
封装形式:CHIP CARRIER包装方法:TUBE
峰值回流温度(摄氏度):NOT SPECIFIED电源:2/6 V
最大电源电流(ICC):0.08 mAProp。Delay @ Nom-Sup:51 ns
传播延迟(tpd):450 ns认证状态:Not Qualified
筛选级别:MIL-PRF-38535座面最大高度:2.03 mm
子类别:Multiplexer/Demultiplexers最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子形式:NO LEAD
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:8.89 mm
Base Number Matches:1

SNJ54HC251FK 数据手册

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ꢊꢋꢌꢋ ꢀꢍ ꢎꢍ ꢅꢌꢏ ꢐꢀꢑ ꢒꢓ ꢎꢌ ꢔꢕ ꢎꢍ ꢖꢍ ꢐ  
SCLS132E − DECEMBER 1982 − REVISED SEPTEMBER 2003  
SN54HC251 . . . J OR W PACKAGE  
SN74HC251 . . . D, DB, N, NS, OR PW PACKAGE  
(TOP VIEW)  
D
D
D
3-State Version of ’HC151  
Wide Operating Voltage Range of 2 V to 6 V  
High-Current 3-State Outputs Interface  
Directly With System Bus or Can Drive Up  
To 15 LSTTL Loads  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
D3  
D2  
D1  
D0  
Y
W
OE  
GND  
V
CC  
D4  
D5  
D6  
D7  
A
D
D
D
D
D
D
Low Power Consumption, 80-µA Max I  
Typical t = 9 ns  
pd  
6-mA Output Drive at 5 V  
CC  
Low Input Current of 1 µA Max  
Perform Parallel-to-Serial Conversion  
B
C
Complementary Outputs Provide True and  
Inverted Data  
SN54HC251 . . . FK PACKAGE  
(TOP VIEW)  
description/ordering information  
These data selectors/multiplexers contain full  
binary decoding to select 1-of-8 data sources and  
feature strobe-controlled complementary 3-state  
outputs.  
3
2
1
20 19  
18 D5  
D1  
D0  
NC  
Y
4
5
6
7
8
17  
16  
15  
14  
D6  
NC  
D7  
A
The 3-state outputs can interface with and drive  
data lines of bus-organized systems. With all but  
one of the common outputs disabled (in the  
high-impedance state), the low impedance of the  
single enabled output drives the bus line to a high  
or low logic level. Both outputs are controlled by  
the output-enable (OE) input. The outputs are  
disabled when OE is high.  
W
9 10 11 12 13  
NC − No internal connection  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
PDIP − N  
SOIC − D  
Tube of 25  
Tube of 40  
Reel of 2500  
Reel of 250  
Reel of 2000  
Reel of 2000  
Tube of 90  
Reel of 2000  
Reel of 250  
Tube of 25  
Tube of 150  
Tube of 55  
SN74HC251N  
SN74HC251N  
SN74HC251D  
SN74HC251DR  
SN74HC251DT  
SN74HC251NSR  
SN74HC251DBR  
SN74HC251PW  
SN74HC251PWR  
SN74HC251PWT  
SNJ54HC251J  
HC251  
SOP − NS  
HC251  
HC251  
−40°C to 85°C  
SSOP − DB  
TSSOP − PW  
HC251  
CDIP − J  
CFP − W  
LCCC − FK  
SNJ54HC251J  
SNJ54HC251W  
SNJ54HC251FK  
−55°C to 125°C  
SNJ54HC251W  
SNJ54HC251FK  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
ꢏ ꢛ ꢦ ꢞ ꢝꢩ ꢤꢣ ꢡꢢ ꢣꢝ ꢟꢦ ꢨꢚ ꢠꢛ ꢡ ꢡꢝ ꢒꢔ ꢎꢙ ꢕꢐ ꢰ ꢙꢘꢱꢂ ꢘꢂꢈ ꢠꢨꢨ ꢦꢠ ꢞ ꢠ ꢟꢥ ꢡꢥꢞ ꢢ ꢠ ꢞ ꢥ ꢡꢥ ꢢꢡꢥ ꢩ  
ꢡ ꢥ ꢢ ꢡꢚ ꢛꢯ ꢝꢜ ꢠ ꢨꢨ ꢦꢠ ꢞ ꢠ ꢟ ꢥ ꢡ ꢥ ꢞ ꢢ ꢪ  
ꢤ ꢛꢨ ꢥꢢꢢ ꢝ ꢡꢫꢥ ꢞ ꢭꢚ ꢢꢥ ꢛ ꢝꢡꢥ ꢩꢪ ꢏ ꢛ ꢠꢨ ꢨ ꢝ ꢡꢫꢥ ꢞ ꢦꢞ ꢝ ꢩꢤꢣ ꢡꢢ ꢈ ꢦꢞ ꢝ ꢩꢤꢣ ꢡꢚꢝ ꢛ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SNJ54HC251FK 替代型号

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