Datasheet > SNJ54ALS190J

SNJ54ALS190J

更新时间： 2024-09-15 06:16:11

品牌	Logo	应用领域
德州仪器 - TI		/
页数	文件大小	规格书
8页	142K
描述
ALS SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT BIDIRECTIONAL DECADE COUNTER, CDIP16, 0.300 INCH, CERAMIC, DIP-16

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SNJ54ALS190J 数据手册

SN54ALS190, SN54ALS191, SN74ALS190, SN74ALS191

SYNCHRONOUS 4-BIT UP/DOWN DECADE AND BINARY COUNTERS

SDAS210 – D2661, DECEMBER 1982 – REVISED MAY 1986

SN54ALS190, SN54ALS191 . . . J PACKAGE

SN74ALS190, SN74ALS191 . . . D OR N PACKAGE

• Single Down/Up Count Control Line

• Look-Ahead Circuitry Enhances Speed of

(TOP VIEW)

Cascaded Counters

• Fully Synchronous in Count Modes

• Asynchronously Presettable With Load

Control

CLK

RCO

MAX/MIN

LOAD

CTEN

D/U

• Package Options Include Plastic Small

Outline Packages, Ceramic Chip Carriers,

and Standard Plastic and Ceramic 300-mil

DIPs

GND

• Dependable Texas Instruments Quality and

Reliability

SN54ALS190, SN54ALS191 . . . FK PACKAGE

(TOP VIEW)

description

The ’ALS190 and ’ALS191 are synchronous,

reversible up/down counters. The ’ALSL90 is a

4-bit decade counter and the ’ALS191 is a 4-bit

binary counter. Synchronous counting operation

is provided by having all flip-flops clocked

simultaneously so that the outputs change

coincident with each other when so instructed by

the steering logic. This mode of operation

eliminates the output counting spikes normally

associated with asynchronous (ripple clock)

counters.

20 19

CLK

RCO

CTEN

MAX/MIN

LOAD

D/U

9 10 11 12 13

The outputs of the four flip-flops are triggered on

a low-to-high-level transition of the clock input if

the enable input CTEN is low. A high at CTEN

inhibits counting. The direction of the count is

determined by the level of the down/up D/U input.

When D/U is low, the counter counts up and when

D/U is high, it counts down.

NC–No internal connection

These counters feature a fully independent clock circuit. Changes at the control inputs (CTEN and D/U) that will

modify the operating mode have no effect on the contents of the counter until clocking occurs. The function of

the counter will be dictated solely by the condition meeting the stable setup and hold times.

These counters are fully programmable; that is, the outputs may each be preset to either level by placing a low

on the load input and entering the desired data at the data inputs. The output will change to agree with the data

inputs independently of the level of the clock input. This feature allows the counters to be used as modulo-N

dividers by simply modifying the count length with the preset inputs.

The CLK, D/U, and LOAD inputs are buffered to lower the drive requirement, which significantly reduces the

loading on, or current required by, clock drivers, etc., for long parallel words.

Two outputs have been made available to perform the cascading function: ripple clock and maximum/minimum

count. The latter output produces a high-level output pulse with a duration approximately equal to one complete

cycle of the clock while the count is zero (all outputs low) counting down or maximum (9 or 15) counting up. The

ripple clock output produces a low-level output pulse under those same conditions but only while the clock input

is low. The counters can be easily cascaded by feeding the ripple clock output to the enable input of the

succeeding counter if parallel clocking is used, or to the clock input if parallel enabling is used. The

maximum/minimum count output can be used to accomplish look-ahead for high-speed operation.

The SN54ALS190 and SN54ALS191 are characterized for operation over the full military temperature range

of –55°C to 125°C. The SN74ALS190 and SN74ALS191 are characterized for operation from 0°C to 70°C.

5BASIC

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6 7 8

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与SNJ54ALS190J相关器件

型号	品牌	获取价格	描述	数据表
SNJ54ALS190J-00	TI	获取价格	ALS SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT BIDIRECTIONAL DECADE COUNTER, CDIP16
SNJ54ALS191AFK	TI	获取价格	同步 4 位加/减二进制计数器 \| FK \| 20 \| -55 to 125
SNJ54ALS191AJ	TI	获取价格	同步 4 位加/减二进制计数器 \| J \| 16 \| -55 to 125
SNJ54ALS191AW	TI	获取价格	同步 4 位加/减二进制计数器 \| W \| 16 \| -55 to 125
SNJ54ALS191FK	TI	获取价格	Synchronous 4-Bit Up/Down Binary Counters 20-LCCC -55 to 125
SNJ54ALS191FKR	TI	获取价格	ALS SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT BIDIRECTIONAL BINARY COUNTER, CQCC20, CERAMI
SNJ54ALS191J	TI	获取价格	Synchronous 4-Bit Up/Down Binary Counters 16-CDIP -55 to 125
SNJ54ALS192J	ROCHESTER	获取价格	Decade Counter, ALS Series, Synchronous, Positive Edge Triggered, 4-Bit, Bidirectional, TT
SNJ54ALS193AJ	TI	获取价格	具有双时钟的同步 4 位加/减二进制计数器 \| J \| 16 \| -55 to 125
SNJ54ALS193AW	TI	获取价格	具有双时钟的同步 4 位加/减二进制计数器 \| W \| 16 \| -55 to 125

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