5秒后页面跳转
捷配首页

Datasheet > SNJ54ALS191J
SNJ54ALS191J PDF预览

SNJ54ALS191J

更新时间： 2024-11-03 09:11:47
品牌 Logo 应用领域
德州仪器 - TI 输出元件逻辑集成电路触发器
页数 文件大小 规格书
8页 142K
描述
Synchronous 4-Bit Up/Down Binary Counters 16-CDIP -55 to 125

阅读下载

中文翻译

获取价格

SNJ54ALS191J 数据手册

 浏览型号SNJ54ALS191J的Datasheet PDF文件第2页浏览型号SNJ54ALS191J的Datasheet PDF文件第3页浏览型号SNJ54ALS191J的Datasheet PDF文件第4页浏览型号SNJ54ALS191J的Datasheet PDF文件第5页浏览型号SNJ54ALS191J的Datasheet PDF文件第6页浏览型号SNJ54ALS191J的Datasheet PDF文件第7页 
SN54ALS190, SN54ALS191, SN74ALS190, SN74ALS191  
SYNCHRONOUS 4-BIT UP/DOWN DECADE AND BINARY COUNTERS  
SDAS210 – D2661, DECEMBER 1982 – REVISED MAY 1986  
SN54ALS190, SN54ALS191 . . . J PACKAGE  
SN74ALS190, SN74ALS191 . . . D OR N PACKAGE  
• Single Down/Up Count Control Line  
• Look-Ahead Circuitry Enhances Speed of  
(TOP VIEW)  
Cascaded Counters  
• Fully Synchronous in Count Modes  
V
A
B
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
CC  
• Asynchronously Presettable With Load  
Q
Q
B
A
Control  
CLK  
RCO  
MAX/MIN  
LOAD  
C
CTEN  
D/U  
• Package Options Include Plastic Small  
Outline Packages, Ceramic Chip Carriers,  
and Standard Plastic and Ceramic 300-mil  
DIPs  
Q
C
Q
D
D
GND  
• Dependable Texas Instruments Quality and  
Reliability  
SN54ALS190, SN54ALS191 . . . FK PACKAGE  
(TOP VIEW)  
description  
The ’ALS190 and ’ALS191 are synchronous,  
reversible up/down counters. The ’ALSL90 is a  
4-bit decade counter and the ’ALS191 is a 4-bit  
binary counter. Synchronous counting operation  
is provided by having all flip-flops clocked  
simultaneously so that the outputs change  
coincident with each other when so instructed by  
the steering logic. This mode of operation  
eliminates the output counting spikes normally  
associated with asynchronous (ripple clock)  
counters.  
3
2
1
20 19  
18  
CLK  
Q
4
5
6
7
8
A
RCO  
CTEN  
NC  
17  
16  
15  
14  
NC  
MAX/MIN  
LOAD  
D/U  
Q
C
9 10 11 12 13  
The outputs of the four flip-flops are triggered on  
a low-to-high-level transition of the clock input if  
the enable input CTEN is low. A high at CTEN  
inhibits counting. The direction of the count is  
determined by the level of the down/up D/U input.  
When D/U is low, the counter counts up and when  
D/U is high, it counts down.  
NC–No internal connection  
These counters feature a fully independent clock circuit. Changes at the control inputs (CTEN and D/U) that will  
modify the operating mode have no effect on the contents of the counter until clocking occurs. The function of  
the counter will be dictated solely by the condition meeting the stable setup and hold times.  
These counters are fully programmable; that is, the outputs may each be preset to either level by placing a low  
on the load input and entering the desired data at the data inputs. The output will change to agree with the data  
inputs independently of the level of the clock input. This feature allows the counters to be used as modulo-N  
dividers by simply modifying the count length with the preset inputs.  
The CLK, D/U, and LOAD inputs are buffered to lower the drive requirement, which significantly reduces the  
loading on, or current required by, clock drivers, etc., for long parallel words.  
Two outputs have been made available to perform the cascading function: ripple clock and maximum/minimum  
count. The latter output produces a high-level output pulse with a duration approximately equal to one complete  
cycle of the clock while the count is zero (all outputs low) counting down or maximum (9 or 15) counting up. The  
ripple clock output produces a low-level output pulse under those same conditions but only while the clock input  
is low. The counters can be easily cascaded by feeding the ripple clock output to the enable input of the  
succeeding counter if parallel clocking is used, or to the clock input if parallel enabling is used. The  
maximum/minimum count output can be used to accomplish look-ahead for high-speed operation.  
The SN54ALS190 and SN54ALS191 are characterized for operation over the full military temperature range  
of –55°C to 125°C. The SN74ALS190 and SN74ALS191 are characterized for operation from 0°C to 70°C.  
Copyright 1986, Texas Instruments Incorporated  
5BASIC  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
12345678

中文翻译

下载PDF

SNJ54ALS191J 替代型号

型号 品牌 替代类型 描述 数据表
5962-8684001EA TI

功能相似

 同步 4 位加/减二进制计数器 | J | 16 | -55 to 125
SNJ54ALS191AJ TI

功能相似

 同步 4 位加/减二进制计数器 | J | 16 | -55 to 125

与SNJ54ALS191J相关器件

型号 品牌 获取价格 描述 数据表
SNJ54ALS192J ROCHESTER

获取价格

 		Decade Counter, ALS Series, Synchronous, Positive Edge Triggered, 4-Bit, Bidirectional, TT
SNJ54ALS193AJ TI

获取价格

 		具有双时钟的同步 4 位加/减二进制计数器 | J | 16 | -55 to 125
SNJ54ALS193AW TI

获取价格

 		具有双时钟的同步 4 位加/减二进制计数器 | W | 16 | -55 to 125
SNJ54ALS20AFK TI

获取价格

 		DUAL 4-INPUT POSITIVE-NAND GATES
SNJ54ALS20AJ TI

获取价格

 		DUAL 4-INPUT POSITIVE-NAND GATES
SNJ54ALS20AW TI

获取价格

 		DUAL 4-INPUT POSITIVE-NAND GATES
SNJ54ALS20J ROCHESTER

获取价格

 		NAND Gate
SNJ54ALS20W ROCHESTER

获取价格

 		NAND Gate
SNJ54ALS21AFK TI

获取价格

 		DUAL 4-INPUT POSITIVE-AND GATES
SNJ54ALS21AJ TI

获取价格

 		DUAL 4-INPUT POSITIVE-AND GATES

与SNJ54ALS191J相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证