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SNJ54AHCT273FK PDF预览

SNJ54AHCT273FK

更新时间: 2024-11-04 05:24:43
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德州仪器 - TI 触发器
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15页 408K
描述
OCTAL D-TYPE FLIP-FLOPS WITH CLEAR

SNJ54AHCT273FK 数据手册

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SN54AHCT273, SN74AHCT273  
OCTAL D-TYPE FLIP-FLOPS  
WITH CLEAR  
SCLS375E – JUNE 1997 – REVISED APRIL 2002  
SN54AHCT273 . . . J OR W PACKAGE  
SN74AHCT273 . . . DB, DGV, DW, N, NS, OR PW PACKAGE  
(TOP VIEW)  
Inputs Are TTL-Voltage Compatible  
Contain Eight Flip-Flops With Single-Rail  
Outputs  
CLR  
1Q  
1D  
2D  
2Q  
3Q  
3D  
4D  
4Q  
V
CC  
Direct Clear Input  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
8Q  
8D  
7D  
7Q  
6Q  
6D  
Individual Data Input to Each Flip-Flop  
Applications Include:  
– Buffer/Storage Registers  
– Shift Registers  
– Pattern Generators  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
13 5D  
12 5Q  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
11  
GND  
CLK  
SN54AHCT273 . . . FK PACKAGE  
(TOP VIEW)  
– 1000-V Charged-Device Model (C101)  
description  
Thesedevicesarepositive-edge-triggeredD-type  
flip-flops with a direct clear (CLR) input.  
3
2
1
20 19  
18  
2D  
2Q  
3Q  
3D  
4D  
8D  
17 7D  
4
5
6
7
8
Information at the data (D) inputs meeting the  
setup time requirements is transferred to the  
Q outputs on the positive-going edge of the clock  
(CLK) pulse. Clock triggering occurs at a  
particular voltage level and is not directly related  
to the transition time of the positive-going pulse.  
When CLK is at either the high or low level, the  
D input has no effect at the output.  
16  
15  
14  
7Q  
6Q  
6D  
9 10 11 12 13  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
PDIP – N  
Tube  
SN74AHCT273N  
SN74AHCT273N  
Tube  
SN74AHCT273DW  
SN74AHCT273DWR  
SN74AHCT273NSR  
SN74AHCT273DBR  
SN74AHCT273PWR  
SOIC – DW  
AHCT273  
Tape and reel  
Tape and reel  
Tape and reel  
Tape and reel  
Tape and reel  
Tube  
–40°C to 85°C  
SOP – NS  
AHCT273  
HB273  
SSOP – DB  
TSSOP – PW  
TVSOP – DGV  
CDIP – J  
HB273  
SN74AHCT273DGVR HB273  
SNJ54AHCT273J  
SNJ54AHCT273W  
SNJ54AHCT273FK  
SNJ54AHCT273J  
–55°C to 125°C  
CFP – W  
Tube  
SNJ54AHCT273W  
SNJ54AHCT273FK  
LCCC – FK  
Tube  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines  
are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2002, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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